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authorAaron Durbin <adurbin@chromium.org>2016-08-11 14:04:10 -0500
committerMartin Roth <martinroth@google.com>2016-08-19 03:04:54 +0200
commit16c173fdf5d6060ecdd63ca4593fb76b2167ab9b (patch)
tree77e1d8fac04949cbd9fb891228b2baa0ea592a13 /src/soc
parentd3d77beffa1e7c8d28deabeda0709e0a0beacce2 (diff)
Kconfig: separate memory mapped boot device from SPI
Make the indication of the boot device being memory mapped separate from SPI. However, retain the same defaults that previously existed. BUG=chrome-os-partner:56151 Change-Id: I06f138078c47a1e4b4b3edbdbf662f171e11c9d4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16228 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/romstage.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 8f17fddd69..067d654b25 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -160,7 +160,8 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd)
* state machine transition to next boot state, so that it can function
* as designed.
*/
- mupd->FspmConfig.SkipCseRbp = IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED);
+ mupd->FspmConfig.SkipCseRbp =
+ IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED);
}
__attribute__ ((weak))