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authorTim Van Patten <timvp@google.com>2022-09-15 17:08:29 -0600
committerMartin L Roth <gaumless@gmail.com>2022-09-19 09:55:20 +0000
commit11ca99550032b11aca8157d94fce728fec8981f2 (patch)
tree2794124b4645ecbc6b613cce7f705bd8433bdfed /src/soc
parentcf9e0a08f584d47c8e6c2e3148e07d9cffe4be7f (diff)
amd/mendocino/root_complex: Set DPTC VRM limit values
Set the DPTC VRM limit values for normal mode. BRANCH=none BUG=b:217911928 TEST=Boot skyrim Signed-off-by: Tim Van Patten <timvp@google.com> Change-Id: I2041a713323f039dcfdacdfa43e74cf450c3c0d1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67691 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/mendocino/root_complex.c22
1 files changed, 19 insertions, 3 deletions
diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c
index fd62130fa1..8bb7683b1c 100644
--- a/src/soc/amd/mendocino/root_complex.c
+++ b/src/soc/amd/mendocino/root_complex.c
@@ -19,14 +19,15 @@
#include <stdint.h>
#include "chip.h"
-#define DPTC_TOTAL_UPDATE_PARAMS 4
+#define DPTC_TOTAL_UPDATE_PARAMS 7
struct dptc_input {
uint16_t size;
struct alib_dptc_param params[DPTC_TOTAL_UPDATE_PARAMS];
} __packed;
-#define DPTC_INPUTS(_thermctllmit, _sustained, _fast, _slow) \
+#define DPTC_INPUTS(_thermctllmit, _sustained, _fast, _slow, \
+ _vrmCurrentLimit, _vrmMaxCurrentLimit, _vrmSocCurrentLimit) \
{ \
.size = sizeof(struct dptc_input), \
.params = { \
@@ -46,6 +47,18 @@ struct dptc_input {
.id = ALIB_DPTC_SLOW_PPT_LIMIT_ID, \
.value = _slow, \
}, \
+ { \
+ .id = ALIB_DPTC_VRM_CURRENT_LIMIT_ID, \
+ .value = _vrmCurrentLimit, \
+ }, \
+ { \
+ .id = ALIB_DPTC_VRM_MAXIMUM_CURRENT_LIMIT, \
+ .value = _vrmMaxCurrentLimit, \
+ }, \
+ { \
+ .id = ALIB_DPTC_VRM_SOC_CURRENT_LIMIT_ID, \
+ .value = _vrmSocCurrentLimit, \
+ }, \
}, \
}
@@ -192,7 +205,10 @@ static void acipgen_dptci(void)
struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC,
config->sustained_power_limit_mW,
config->fast_ppt_limit_mW,
- config->slow_ppt_limit_mW);
+ config->slow_ppt_limit_mW,
+ config->vrm_current_limit_mA,
+ config->vrm_maximum_current_limit_mA,
+ config->vrm_soc_current_limit_mA);
acpigen_write_alib_dptc_default((uint8_t *)&default_input, sizeof(default_input));
}