summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2023-02-28 07:04:48 +0000
committerLean Sheng Tan <sheng.tan@9elements.com>2023-03-13 14:14:06 +0000
commit01209524f4b3940f321048b3a992c537ee753308 (patch)
tree4576f7b5e7f42feeeadb8104db187dabf8d56da3 /src/soc
parentdbfbfaf608c330515c1702bd4eba3b59727bc4df (diff)
soc/intel/meteorlake: Enable early caching of TOM region
Intel Meteor Lake decides to enable early caching of the TOM region to optimize the boot time by selecting `SOC_INTEL_COMMON_BASECODE_TOM` config. TEST=Able to build and boot google/rex to ChromeOS and reduce the boot time by 77 ms. Without this patch: 950:calling FspMemoryInit 936,811 (19,941) 951:returning from FspMemoryInit 1,041,935 (105,123) With this patch: 950:calling FspMemoryInit 905,108 (20,103) 951:returning from FspMemoryInit 964,038 (59,929) Change-Id: Iebb3485b052386b43d5bccd67a04e6115cbcc20d Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73274 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/meteorlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 6bcce792c7..f2d2700e80 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -83,6 +83,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
select SOC_INTEL_COMMON_BASECODE
+ select SOC_INTEL_COMMON_BASECODE_TOM
select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_CLIENT
select SOC_INTEL_COMMON_RESET