diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-08-09 19:59:20 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-27 16:31:21 +0000 |
| commit | d61e832e53029fd135c877514d3d2d38167aafd6 (patch) | |
| tree | c371292595cb6cdebfea26f4cd803f677e717c3e /src/soc | |
| parent | 18b477ea4108335eb6d5a4b6f39578cbe5525ac1 (diff) | |
soc/amd/stoneyridge: Revert CAR teardown wbinvd
Change the cache-as-ram teardown to use invd instead of wbinvd.
Save the return and recover the call's return address in
chipset_teardown_car.
CAR teardown had been modified to use wbinvd to send CAR contents
to DRAM backing prior to teardown. This allowed CAR variables,
stack, and local variables to be preserved while running the
AMD_DISABLE_STACK macro.
Using the wbinvd instruction has the side effect of sending all
dirty cache contents to DRAM and not only our CAR data. This
would likely cause corruption, e.g. during S3 resume.
Stoney Ridge now uses a postcar stage and this is no longer a
requirement.
BUG=b:64768556
Change-Id: I8e6bcb3947f508b1db1a42fd0714bba70074837a
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20967
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/cpu/Kconfig | 8 | ||||
| -rw-r--r-- | src/soc/amd/common/block/cpu/car/exit_car.S | 3 |
2 files changed, 7 insertions, 4 deletions
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index 86cc77194c..5941599df0 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -3,6 +3,8 @@ config SOC_AMD_COMMON_BLOCK_CAR default n help This option allows the SOC to use a standard AMD cache-as-ram (CAR) - implementation. CAR setup is built into bootblock and teardown in - romstage. If it is not used the system must implement these functions - separately. + implementation. CAR setup is built into bootblock and teardown is + in postcar. The teardown procedure does not preserve the stack so + it may not be appropriate for a romstage implementation without + additional consideration. If this option is not used, the SOC must + implement these functions separately. diff --git a/src/soc/amd/common/block/cpu/car/exit_car.S b/src/soc/amd/common/block/cpu/car/exit_car.S index ac36cb0e4f..f9d056e599 100644 --- a/src/soc/amd/common/block/cpu/car/exit_car.S +++ b/src/soc/amd/common/block/cpu/car/exit_car.S @@ -20,6 +20,7 @@ .globl chipset_teardown_car chipset_teardown_car: + pop %esp /* Disable cache */ movl %cr0, %eax @@ -33,4 +34,4 @@ chipset_teardown_car: andl $(~(CR0_CD | CR0_NW)), %eax movl %eax, %cr0 - ret + jmp *%esp |