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authorSumeet R Pawnikar <sumeet.r.pawnikar@intel.com>2020-09-11 18:51:36 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-09-22 07:02:26 +0000
commitccbe5307d80c28953132a02dae97f0a984ffecbc (patch)
tree5c2f35626031ccb0f92a670ab2f49a17a6cb60f0 /src/soc
parente5655a11d21cd0b51220b11a58014c1855864075 (diff)
soc/intel/jasperlake: Enable processor thermal control using PCI_DEVFN
Enable processor thermal control using PCI dev path function instead of Device4Enable parameter in devicetree. This change removes the dependency on Device4Enable in devicetree. We can enable and disable this thermal control using on and off support with PCI device entry in devicetree. BRANCH=None BUG=None TEST=Built and tested on dedede board Change-Id: I0463236996ad001af506c9966840b27fe44d60d2 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45454 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/jasperlake/chip.h1
-rw-r--r--src/soc/intel/jasperlake/fsp_params.c4
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index 3f0b910327..6b5f599911 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -142,7 +142,6 @@ struct soc_intel_jasperlake_config {
uint8_t SkipExtGfxScan;
uint32_t GraphicsConfigPtr;
- uint8_t Device4Enable;
/* HeciEnabled decides the state of Heci1 at end of boot
* Setting to 0 (default) disables Heci1 and hides the device from OS */
diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index ff9bfbfe72..cdd088eb26 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -183,7 +183,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
if (params->ScsSdCardEnabled)
params->SdCardPowerEnableActiveHigh = config->SdCardPowerEnableActiveHigh;
- params->Device4Enable = config->Device4Enable;
+ /* Enable Processor Thermal Control */
+ dev = pcidev_path_on_root(SA_DEVFN_DPTF);
+ params->Device4Enable = is_dev_enabled(dev);
/* Set TccActivationOffset */
params->TccActivationOffset = config->tcc_offset;