soc/amd: Refactor ACPI power state and ELOG

Change-Id: Ib7423c8d80355871393c377ebaffdfe2846d8852
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49836
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

8 files changed, 30 insertions, 23 deletions

diff --git a/src/soc/amd/common/block/acpi/acpi.c b/src/soc/amd/common/block/acpi/acpi.c
index 43cc49ccb0..16da743efb 100644
--- a/src/soc/amd/common/block/acpi/acpi.c
+++ b/src/soc/amd/common/block/acpi/acpi.c
@@ -4,6 +4,7 @@
 #include <amdblocks/acpi.h>
 #include <acpi/acpi.h>
 #include <acpi/acpi_gnvs.h>
+#include <acpi/acpi_pm.h>
 #include <bootmode.h>
 #include <console/console.h>
 #include <elog.h>
@@ -106,8 +107,15 @@ void acpi_fill_pm_gpe_state(struct acpi_pm_gpe_state *state)
 	state->aligning_field = 0;
 }
 
-void acpi_pm_gpe_add_events_print_events(const struct acpi_pm_gpe_state *state)
+void acpi_pm_gpe_add_events_print_events(void)
 {
+	const struct chipset_power_state *ps;
+	const struct acpi_pm_gpe_state *state;
+
+	if (acpi_pm_state_for_elog(&ps) < 0)
+		return;
+
+	state = &ps->gpe_state;
 	log_pm1_status(state->pm1_sts);
 	print_pm1_status(state->pm1_sts);
 	log_gpe_events(state);
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c
index bdc243fa2c..5b0111b28f 100644
--- a/src/soc/amd/common/block/gpio_banks/gpio.c
+++ b/src/soc/amd/common/block/gpio_banks/gpio.c
@@ -1,10 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <acpi/acpi_pm.h>
 #include <device/mmio.h>
 #include <device/device.h>
 #include <console/console.h>
 #include <elog.h>
 #include <gpio.h>
+#include <amdblocks/acpi.h>
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/gpio_banks.h>
 #include <amdblocks/smi.h>
@@ -363,11 +365,17 @@ void gpio_fill_wake_state(struct gpio_wake_state *state)
 	check_gpios(state->wake_stat[1], 14, 128, state);
 }
 
-void gpio_add_events(const struct gpio_wake_state *state)
+void gpio_add_events(void)
 {
+	const struct chipset_power_state *ps;
+	const struct gpio_wake_state *state;
 	int i;
 	int end;
 
+	if (acpi_pm_state_for_elog(&ps) < 0)
+		return;
+	state = &ps->gpio_state;
+
 	end = MIN(state->num_valid_wake_gpios, ARRAY_SIZE(state->wake_gpios));
 	for (i = 0; i < end; i++)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, state->wake_gpios[i]);
diff --git a/src/soc/amd/common/block/include/amdblocks/acpi.h b/src/soc/amd/common/block/include/amdblocks/acpi.h
index 74b8408488..aa40706f96 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpi.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpi.h
@@ -4,6 +4,7 @@
 #define AMD_BLOCK_ACPI_H
 
 #include <types.h>
+#include <amdblocks/gpio_banks.h>
 
 /* ACPI MMIO registers 0xfed80800 */
 #define MMIO_ACPI_PM1_STS		0x00
@@ -29,7 +30,7 @@ struct acpi_pm_gpe_state {
 /* Fill object with the ACPI PM and GPE state. */
 void acpi_fill_pm_gpe_state(struct acpi_pm_gpe_state *state);
 /* Save events to eventlog log and also print information on console. */
-void acpi_pm_gpe_add_events_print_events(const struct acpi_pm_gpe_state *state);
+void acpi_pm_gpe_add_events_print_events(void);
 /* Clear PM and GPE status registers. */
 void acpi_clear_pm_gpe_status(void);
 
@@ -41,4 +42,9 @@ void set_pm1cnt_s5(void);
 void acpi_enable_sci(void);
 void acpi_disable_sci(void);
 
+struct chipset_power_state {
+	struct acpi_pm_gpe_state gpe_state;
+	struct gpio_wake_state gpio_state;
+};
+
 #endif /* AMD_BLOCK_ACPI_H */
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
index 6524d05a54..2d3c769438 100644
--- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
+++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h
@@ -30,7 +30,7 @@ struct gpio_wake_state {
 /* Fill gpio_wake_state object for future event reporting. */
 void gpio_fill_wake_state(struct gpio_wake_state *state);
 /* Add gpio events to the eventlog. */
-void gpio_add_events(const struct gpio_wake_state *state);
+void gpio_add_events(void);
 
 enum {
 	GEVENT_0,
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c
index d9a18e1cd2..4fdaa391e7 100644
--- a/src/soc/amd/picasso/fch.c
+++ b/src/soc/amd/picasso/fch.c
@@ -205,16 +205,12 @@ static void gpp_clk_setup(void)
 
 void southbridge_init(void *chip_info)
 {
-	struct chipset_power_state *state;
-
 	i2c_soc_init();
 	sb_init_acpi_ports();
 
-	state = acpi_get_pm_state();
-	if (state) {
-		acpi_pm_gpe_add_events_print_events(&state->gpe_state);
-		gpio_add_events(&state->gpio_state);
-	}
+	acpi_pm_gpe_add_events_print_events();
+	gpio_add_events();
+
 	acpi_clear_pm_gpe_status();
 
 	al2ahb_clock_gate();
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index dc63d0099a..5ee70b0637 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -5,7 +5,6 @@
 
 #include <acpi/acpi.h>
 #include <amdblocks/acpi.h>
-#include <amdblocks/gpio_banks.h>
 #include <device/device.h>
 #include <stdint.h>
 
@@ -17,10 +16,4 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current
 
 const char *soc_acpi_name(const struct device *dev);
 
-/* Object to capture state of chipset for logging events. */
-struct chipset_power_state {
-	struct acpi_pm_gpe_state gpe_state;
-	struct gpio_wake_state gpio_state;
-};
-
 #endif /* AMD_PICASSO_ACPI_H */
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index a498eb9370..4eb7f359ec 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -17,8 +17,4 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
 
 const char *soc_acpi_name(const struct device *dev);
 
-struct chipset_power_state {
-	struct acpi_pm_gpe_state gpe_state;
-};
-
 #endif /* AMD_STONEYRIDGE_ACPI_H */
diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c
index 2a380969e0..feb25f1e09 100644
--- a/src/soc/amd/stoneyridge/southbridge.c
+++ b/src/soc/amd/stoneyridge/southbridge.c
@@ -411,7 +411,7 @@ void southbridge_init(void *chip_info)
 	state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
 	if (state) {
 		acpi_fill_pm_gpe_state(&state->gpe_state);
-		acpi_pm_gpe_add_events_print_events(&state->gpe_state);
+		acpi_pm_gpe_add_events_print_events();
 	}
 
 	acpi_clear_pm_gpe_status();