arch/non-x86: Remove use of __PRE_RAM__

Change-Id: Id8918f40572497b068509b5d5a490de0435ad50b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

12 files changed, 0 insertions, 29 deletions

diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c
index a39f2ec4d8..3afd5550b1 100644
--- a/src/soc/imgtec/pistachio/uart.c
+++ b/src/soc/imgtec/pistachio/uart.c
@@ -143,7 +143,6 @@ void uart_tx_flush(int idx)
 	uart8250_mem_tx_flush(CONFIG_CONSOLE_SERIAL_UART_ADDRESS);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -155,4 +154,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c
index 8905c55528..d4a052f28e 100644
--- a/src/soc/mediatek/common/uart.c
+++ b/src/soc/mediatek/common/uart.c
@@ -172,7 +172,6 @@ void uart_tx_flush(int idx)
 	mtk_uart_tx_flush();
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -185,4 +184,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/nvidia/tegra/dc.h b/src/soc/nvidia/tegra/dc.h
index a9061f8ce8..56332e433a 100644
--- a/src/soc/nvidia/tegra/dc.h
+++ b/src/soc/nvidia/tegra/dc.h
@@ -515,9 +515,7 @@ struct tegra_dc_mode {
 unsigned long READL(void *p);
 void WRITEL(unsigned long value, void *p);
 
-#ifndef __PRE_RAM__
 void display_startup(struct device *dev);
-#endif
 void dp_init(void *_config);
 void dp_enable(void *_dp);
 unsigned int fb_base_mb(void);
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index c9514ac1fc..b1989dd08b 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -128,7 +128,6 @@ void uart_tx_flush(int idx)
 	tegra124_uart_tx_flush(uart_ptr);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -140,4 +139,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index a91818c8c6..459cf749a6 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -115,7 +115,6 @@ unsigned char uart_rx_byte(int idx)
 	return tegra210_uart_rx_byte();
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -127,4 +126,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/qualcomm/ipq40xx/blobs_init.c b/src/soc/qualcomm/ipq40xx/blobs_init.c
index 5cda9fc7fb..9d608fa93d 100644
--- a/src/soc/qualcomm/ipq40xx/blobs_init.c
+++ b/src/soc/qualcomm/ipq40xx/blobs_init.c
@@ -58,8 +58,6 @@ static void *load_ipq_blob(const char *file_name)
 	return blob_mbn;
 }
 
-#ifdef __PRE_RAM__
-
 #define DDR_VERSION() ((const char *)"private build")
 #define MAX_DDR_VERSION_SIZE 48
 
@@ -120,7 +118,6 @@ int initialize_dram(void)
 	return 0;
 }
 
-#else  /* __PRE_RAM__ */
 void start_tzbsp(void)
 {
 	void *tzbsp = load_ipq_blob(CONFIG_TZ_MBN);
@@ -133,4 +130,3 @@ void start_tzbsp(void)
 	tz_init_wrapper(0, 0, tzbsp);
 
 }
-#endif  /* !__PRE_RAM__ */
diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c
index eb3731b7f7..95e2eab16d 100644
--- a/src/soc/qualcomm/ipq40xx/uart.c
+++ b/src/soc/qualcomm/ipq40xx/uart.c
@@ -283,7 +283,6 @@ uint8_t uart_rx_byte(int idx)
 	return byte;
 }
 
-#ifndef __PRE_RAM__
 /* TODO: Implement function */
 void uart_fill_lb(void *data)
 {
@@ -297,4 +296,3 @@ void uart_fill_lb(void *data)
 	lb_add_serial(&serial, data);
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c
index aa78f566e9..2da868b892 100644
--- a/src/soc/qualcomm/ipq806x/blobs_init.c
+++ b/src/soc/qualcomm/ipq806x/blobs_init.c
@@ -57,8 +57,6 @@ static void *load_ipq_blob(const char *file_name)
 	return blob_mbn + 1;
 }
 
-#ifdef __PRE_RAM__
-
 #define DDR_VERSION() ((const char *)0x2a03f600)
 #define MAX_DDR_VERSION_SIZE 48
 
@@ -89,8 +87,6 @@ int initialize_dram(void)
 	return 0;
 }
 
-#else  /* __PRE_RAM__ */
-
 void start_tzbsp(void)
 {
 	void *tzbsp = load_ipq_blob("tz.mbn");
@@ -152,4 +148,3 @@ void start_rpm(void)
 	       (rpm_version >> 16) & 0xff,
 	       rpm_version & 0xffff);
 }
-#endif  /* !__PRE_RAM__ */
diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c
index 66c31034fa..f3e7de5910 100644
--- a/src/soc/qualcomm/ipq806x/uart.c
+++ b/src/soc/qualcomm/ipq806x/uart.c
@@ -398,9 +398,7 @@ uint8_t uart_rx_byte(int idx)
 	return byte;
 }
 
-#ifndef __PRE_RAM__
 /* TODO: Implement fuction */
 void uart_fill_lb(void *data)
 {
 }
-#endif
diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c
index 4a4331220a..6f95ba4ac6 100644
--- a/src/soc/qualcomm/qcs405/uart.c
+++ b/src/soc/qualcomm/qcs405/uart.c
@@ -287,7 +287,6 @@ uint8_t uart_rx_byte(int idx)
 }
 #endif
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -300,4 +299,3 @@ void uart_fill_lb(void *data)
 	lb_add_serial(&serial, data);
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c
index 1b8e7859f1..53290cf8d9 100644
--- a/src/soc/samsung/exynos5250/uart.c
+++ b/src/soc/samsung/exynos5250/uart.c
@@ -185,7 +185,6 @@ void uart_tx_flush(int idx)
 	exynos5_uart_tx_flush(uart);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -197,4 +196,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif
diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c
index b2a0edd4e0..41fdd0d29c 100644
--- a/src/soc/samsung/exynos5420/uart.c
+++ b/src/soc/samsung/exynos5420/uart.c
@@ -176,7 +176,6 @@ void uart_tx_flush(int idx)
 	/* Exynos5250 implements this too. */
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -190,4 +189,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif