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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-03 23:18:01 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-08 04:51:32 +0000 |
| commit | 9970b61ad3049d87650cd7b4eb5f47d667098186 (patch) | |
| tree | 912ee2624ebd4d9c68ab62cbde170c1e5d114b0f /src/soc | |
| parent | 0a4457ff44b10f22b711f64e88888c757fbedf32 (diff) | |
arch/x86: Move TSEG_STAGE_CACHE implementation
This is declared weak so that platforms that do not
have smm_subregion() can provide their own implementation.
Change-Id: Ide815b45cbc21a295b8e58434644e82920e84e31
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34704
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/ramtop.c | 10 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/ramtop.c | 10 | ||||
| -rw-r--r-- | src/soc/intel/common/block/smm/smm.c | 12 |
3 files changed, 0 insertions, 32 deletions
diff --git a/src/soc/amd/picasso/ramtop.c b/src/soc/amd/picasso/ramtop.c index 4ff4252c76..f0051e4bfe 100644 --- a/src/soc/amd/picasso/ramtop.c +++ b/src/soc/amd/picasso/ramtop.c @@ -23,7 +23,6 @@ #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> #include <cbmem.h> -#include <stage_cache.h> #include <arch/bert_storage.h> #include <soc/northbridge.h> #include <soc/iomap.h> @@ -82,15 +81,6 @@ static size_t smm_region_size(void) return CONFIG_SMM_TSEG_SIZE; } -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} - void smm_region(void **start, size_t *size) { *start = (void *)smm_region_start(); diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c index 4ff4252c76..f0051e4bfe 100644 --- a/src/soc/amd/stoneyridge/ramtop.c +++ b/src/soc/amd/stoneyridge/ramtop.c @@ -23,7 +23,6 @@ #include <cpu/amd/msr.h> #include <cpu/amd/mtrr.h> #include <cbmem.h> -#include <stage_cache.h> #include <arch/bert_storage.h> #include <soc/northbridge.h> #include <soc/iomap.h> @@ -82,15 +81,6 @@ static size_t smm_region_size(void) return CONFIG_SMM_TSEG_SIZE; } -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} - void smm_region(void **start, size_t *size) { *start = (void *)smm_region_start(); diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c index 489462dfa7..12c057b25a 100644 --- a/src/soc/intel/common/block/smm/smm.c +++ b/src/soc/intel/common/block/smm/smm.c @@ -22,18 +22,6 @@ #include <intelblocks/smm.h> #include <intelblocks/systemagent.h> #include <soc/pm.h> -#include <stage_cache.h> - -#if !CONFIG(PLATFORM_USES_FSP1_1) -void stage_cache_external_region(void **base, size_t *size) -{ - if (smm_subregion(SMM_SUBREGION_CACHE, base, size)) { - printk(BIOS_ERR, "ERROR: No cache SMM subregion.\n"); - *base = NULL; - *size = 0; - } -} -#endif void smm_southbridge_clear_state(void) { |