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authorFelix Held <felix-coreboot@felixheld.de>2021-02-04 22:01:45 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-05 22:06:19 +0000
commit4cecca49250e46375efbccf61e6085762c140c4c (patch)
treed6d7eda1e63db020a0b93919cf5deef82cec62e1 /src/soc
parent7e703d77b2cb2189863d2a2e87f7de2913e20307 (diff)
soc/amd/cezanne/iomap: move MMIO range comment above MMIO ranges
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ib7e47e3ba29d171266792fc1ffa8f18e314dc770 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50289 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/include/soc/iomap.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/include/soc/iomap.h b/src/soc/amd/cezanne/include/soc/iomap.h
index 01b06479d8..b91ff2785b 100644
--- a/src/soc/amd/cezanne/include/soc/iomap.h
+++ b/src/soc/amd/cezanne/include/soc/iomap.h
@@ -3,6 +3,7 @@
#ifndef AMD_CEZANNE_IOMAP_H
#define AMD_CEZANNE_IOMAP_H
+/* MMIO Ranges */
/* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000
@@ -11,7 +12,6 @@
#define APU_UART0_BASE 0xfedc9000
#define APU_UART1_BASE 0xfedca000
-/* MMIO Ranges */
#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1)
/* I/O Ranges */