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authorLijian Zhao <lijian.zhao@intel.com>2019-04-14 12:27:02 -0700
committerDuncan Laurie <dlaurie@chromium.org>2019-04-19 01:40:45 +0000
commit395f1e328d284ed516fb3064c4d59f8810e677c6 (patch)
treeef6f23cd1512f2895e689d59ab82b975d8a07485 /src/soc
parent357e5525620021db6e53e225bfa4776dc1b84a91 (diff)
soc/intel/cannonlake: Add report for iGD 0x3ea1
Integrated graphics id 0x3ea1 reported as unknown in bootblock stage, make it correct. BUG=N/A TEST=Boot up into sarien platform and check with serial log, it shows IGD: device id 3ea1 (rev 02) is Whiskeylake ULT GT1. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: I2c4c697b108be7fa74736514ca71469a1ca29c22 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32320 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/bootblock/report_platform.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 37b55c7447..e0c91945fe 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -96,7 +96,8 @@ static struct {
{ PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" },
{ PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" },
{ PCI_DEVICE_ID_INTEL_CFL_GT2_ULT, "Coffeelake ULT GT2" },
- { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT1" },
+ { PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1, "Whiskeylake ULT GT1" },
+ { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" },
{ PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" },
{ PCI_DEVICE_ID_INTEL_CFL_S_GT2, "Coffeelake-S GT2" },
{ PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" },