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authorMatt DeVillier <matt.devillier@gmail.com>2020-11-28 13:17:54 -0600
committerMichael Niewöhner <foss@mniewoehner.de>2020-12-30 16:35:36 +0000
commitc6589aefc16dc8911bc07c2fbdf2e81efe732796 (patch)
tree4857b52d4de5347a807e7d258b3a321dbd61d73a /src/soc
parent5cf4c87da70b11e0b9dcb2f7bcb31b537811ca86 (diff)
drivers/intel/gma: Include gfx.asl by default for all platforms...
which select INTEL_GMA_ACPI. Rework brightness level includes and platform-level asl files to avoid duplicate device definition for GFX0. Include gfx.asl for Skylake/Kabylake, since all other soc/intel/common platforms already do. Adjust mb/51nb/x210 to prevent device redefinition. Some OSes (e.g. Windows, MacOS) require/prefer the ACPI device for the IGD to exist, even if ACPI brightness controls are not utilized. This change adds a GFX0 ACPI device for all boards whose platforms select INTEL_GMA_ACPI without requiring non-functional brightness controls to be added at the board level. Change-Id: Ie71bd5fc7acd926b7ce7da17fbc108670fd453e0 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/acpi/southcluster.asl3
-rw-r--r--src/soc/intel/braswell/acpi/southcluster.asl3
-rw-r--r--src/soc/intel/broadwell/acpi/hostbridge.asl3
-rw-r--r--src/soc/intel/skylake/acpi/pch.asl3
4 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index e3997d75f7..f59f2406ef 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -256,3 +256,6 @@ Scope (\_SB.PCI0)
// LPE Device
#include "lpe.asl"
}
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index 2c31d40d22..d74647e98d 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -272,3 +272,6 @@ Scope (\_SB.PCI0)
/* SCC Devices */
#include "scc.asl"
}
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>
diff --git a/src/soc/intel/broadwell/acpi/hostbridge.asl b/src/soc/intel/broadwell/acpi/hostbridge.asl
index 3e7ced0296..2b44c6522f 100644
--- a/src/soc/intel/broadwell/acpi/hostbridge.asl
+++ b/src/soc/intel/broadwell/acpi/hostbridge.asl
@@ -195,3 +195,6 @@ Device (PDRC)
/* Configurable TDP */
#include "ctdp.asl"
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>
diff --git a/src/soc/intel/skylake/acpi/pch.asl b/src/soc/intel/skylake/acpi/pch.asl
index 6eea5bb53a..02e30f770f 100644
--- a/src/soc/intel/skylake/acpi/pch.asl
+++ b/src/soc/intel/skylake/acpi/pch.asl
@@ -65,3 +65,6 @@ Method (_OSC, 4)
#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX)
#include <soc/intel/common/acpi/sgx.asl>
#endif
+
+/* Integrated graphics 0:2.0 */
+#include <drivers/intel/gma/acpi/gfx.asl>