soc/intel/common: Adapt XHCI elog driver for reuse

Currently this XHCI driver assumes the PCH XHCI controller, but the TCSS
or North XHCI block has a similar enough PCI MMIO structure to make this
code mostly reusable.

1) Rename everything to drop the `pch_` prefix
2) xhci_update_wake_event() now takes in a pci_devfn_t for the XHCI
controller
3) soc_get_xhci_usb_info() also now takes a pci_devfn_t for the XHCI
controller

BUG=b:172279037
TEST=plug in USB keyboard while in S0, enter S0ix and verify entry via
EC; type on keyboard, verify it wakes up, eventlog contains:
39 | 2020-12-10 09:40:21 | S0ix Enter
40 | 2020-12-10 09:40:42 | S0ix Exit
41 | 2020-12-10 09:40:42 | Wake Source | PME - XHCI (USB 2.0 port) | 1
42 | 2020-12-10 09:40:42 | Wake Source | GPE # | 109
which verifies it still functions for the PCH XHCI controller

Change-Id: I9f28354e031e3eda587f4faf8ef7595dce8b33ea
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47411
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

13 files changed, 159 insertions, 165 deletions

diff --git a/src/soc/intel/apollolake/elog.c b/src/soc/intel/apollolake/elog.c
index 3e82c32e69..b65ab10e6d 100644
--- a/src/soc/intel/apollolake/elog.c
+++ b/src/soc/intel/apollolake/elog.c
@@ -2,6 +2,7 @@
 
 #include <cbmem.h>
 #include <console/console.h>
+#include <device/pci_type.h>
 #include <elog.h>
 #include <intelblocks/pmclib.h>
 #include <intelblocks/xhci.h>
@@ -24,6 +25,10 @@ static void pch_log_gpio_gpe(u32 gpe0_sts, u32 gpe0_en, int start)
 
 static void pch_log_wake_source(struct chipset_power_state *ps)
 {
+	const struct xhci_wake_info xhci_wake_info[] = {
+		{ PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
+	};
+
 	/* Power Button */
 	if (ps->pm1_sts & PWRBTN_STS)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_PWRBTN, 0);
@@ -42,7 +47,8 @@ static void pch_log_wake_source(struct chipset_power_state *ps)
 
 	/* XHCI */
 	if (ps->gpe0_sts[GPE0_A] & XHCI_PME_STS)
-		pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+		xhci_update_wake_event(xhci_wake_info,
+				       ARRAY_SIZE(xhci_wake_info));
 
 	/* SMBUS Wake */
 	if (ps->gpe0_sts[GPE0_A] & SMB_WAK_STS)
diff --git a/src/soc/intel/apollolake/xhci.c b/src/soc/intel/apollolake/xhci.c
index 4584dc7085..47156f4102 100644
--- a/src/soc/intel/apollolake/xhci.c
+++ b/src/soc/intel/apollolake/xhci.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <device/pci_type.h>
 #include <intelblocks/xhci.h>
 
 #define XHCI_USB2_PORT_STATUS_REG	0x480
@@ -19,7 +20,8 @@ static const struct xhci_usb_info usb_info = {
 	.num_usb3_ports = XHCI_USB3_PORT_NUM,
 };
 
-const struct xhci_usb_info *soc_get_xhci_usb_info(void)
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
 {
+	/* Apollo Lake only has one XHCI controller */
 	return &usb_info;
 }
diff --git a/src/soc/intel/cannonlake/elog.c b/src/soc/intel/cannonlake/elog.c
index 3600d76d95..104a78c2ab 100644
--- a/src/soc/intel/cannonlake/elog.c
+++ b/src/soc/intel/cannonlake/elog.c
@@ -22,19 +22,6 @@ struct pme_status_info {
 
 #define PME_STS_BIT		(1 << 15)
 
-static void pch_log_add_elog_event(const struct pme_status_info *info)
-{
-	/*
-	 * If wake source is XHCI, check for detailed wake source events on
-	 * USB2/3 ports.
-	 */
-	if ((info->dev == PCH_DEV_XHCI) &&
-			pch_xhci_update_wake_event(soc_get_xhci_usb_info()))
-		return;
-
-	elog_add_event_wake(info->elog_event, 0);
-}
-
 static void pch_log_pme_internal_wake_source(void)
 {
 	size_t i;
@@ -46,12 +33,11 @@ static void pch_log_pme_internal_wake_source(void)
 	uint16_t val;
 	bool dev_found = false;
 
-	struct pme_status_info pme_status_info[] = {
+	const struct pme_status_info pme_status_info[] = {
 		{ PCH_DEV_HDA, 0x54, ELOG_WAKE_SOURCE_PME_HDA },
 		{ PCH_DEV_GBE, 0xcc, ELOG_WAKE_SOURCE_PME_GBE },
 		{ PCH_DEV_SATA, 0x74, ELOG_WAKE_SOURCE_PME_SATA },
 		{ PCH_DEV_CSE, 0x54, ELOG_WAKE_SOURCE_PME_CSE },
-		{ PCH_DEV_XHCI, 0x74, ELOG_WAKE_SOURCE_PME_XHCI },
 		{ PCH_DEV_USBOTG, 0x84, ELOG_WAKE_SOURCE_PME_XDCI },
 		/*
 		 * The power management control/status register is not
@@ -60,6 +46,9 @@ static void pch_log_pme_internal_wake_source(void)
 		 */
 		{ PCH_DEV_CNViWIFI, 0xcc, ELOG_WAKE_SOURCE_PME_WIFI },
 	};
+	const struct xhci_wake_info xhci_wake_info[] = {
+		{ PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
+	};
 
 	for (i = 0; i < ARRAY_SIZE(pme_status_info); i++) {
 		dev = pme_status_info[i].dev;
@@ -71,19 +60,20 @@ static void pch_log_pme_internal_wake_source(void)
 		if ((val == 0xFFFF) || !(val & PME_STS_BIT))
 			continue;
 
-		pch_log_add_elog_event(&pme_status_info[i]);
+		elog_add_event_wake(pme_status_info[i].elog_event, 0);
 		dev_found = true;
 	}
 
 	/*
-	 * If device is still not found, but the wake source is internal PME,
-	 * try probing XHCI ports to see if any of the USB2/3 ports indicate
-	 * that it was the wake source. This path would be taken in case of GSMI
-	 * logging with S0ix where the pci_pm_resume_noirq runs and clears the
-	 * PME_STS_BIT in controller register.
+	 * Check the XHCI controllers' USB2 & USB3 ports for wake events. There
+	 * are cases (GSMI logging for S0ix clears PME_STS_BIT) where the XHCI
+	 * controller's PME_STS_BIT may have already been cleared, so the host
+	 * controller wake wouldn't get logged here; therefore, the host
+	 * controller wake event is logged before its corresponding port wake
+	 * event is logged.
 	 */
-	if (!dev_found)
-		dev_found = pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+	dev_found |= xhci_update_wake_event(xhci_wake_info,
+					    ARRAY_SIZE(xhci_wake_info));
 
 	if (!dev_found)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0);
diff --git a/src/soc/intel/cannonlake/xhci.c b/src/soc/intel/cannonlake/xhci.c
index 46cc120a06..0fb093682d 100644
--- a/src/soc/intel/cannonlake/xhci.c
+++ b/src/soc/intel/cannonlake/xhci.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <device/pci_type.h>
 #include <intelblocks/xhci.h>
 
 #define XHCI_USB2_PORT_STATUS_REG	0x480
@@ -14,7 +15,7 @@ static const struct xhci_usb_info usb_info = {
 	.num_usb3_ports = XHCI_USB3_PORT_NUM,
 };
 
-const struct xhci_usb_info *soc_get_xhci_usb_info(void)
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
 {
 	return &usb_info;
 }
diff --git a/src/soc/intel/common/block/include/intelblocks/xhci.h b/src/soc/intel/common/block/include/intelblocks/xhci.h
index 568d2924fb..1adcbc0167 100644
--- a/src/soc/intel/common/block/include/intelblocks/xhci.h
+++ b/src/soc/intel/common/block/include/intelblocks/xhci.h
@@ -4,6 +4,8 @@
 #define SOC_INTEL_COMMON_BLOCK_XHCI_H
 
 #include <device/device.h>
+#include <elog.h>
+#include <stdint.h>
 
 /*
  * struct xhci_usb_info - Data containing number of USB ports & offset.
@@ -20,7 +22,19 @@ struct xhci_usb_info {
 };
 
 /*
- * pch_xhci_update_wake_event() - Identify and log XHCI wake events.
+ * struct xhci_wake_info - Relates an XHCI device to registers and wake types
+ * @xhci_dev: devfn of the XHCI device
+ * @elog_wake_type_host: the wake type for the controller device
+ */
+struct xhci_wake_info {
+	pci_devfn_t xhci_dev;
+	uint8_t elog_wake_type_host;
+};
+
+/*
+ * xhci_update_wake_event() - Identify and log XHCI wake events.
+ * @wake_info: A mapping of XHCI devfn to elog wake types
+ * @wake_info_count: Count of items in wake_info
  * @info: Information about number of USB ports and their status reg offset.
  *
  * This function goes through individual USB port status registers within the
@@ -29,7 +43,8 @@ struct xhci_usb_info {
  *
  * Return: True if any port is identified as a wake source, false if none.
  */
-bool pch_xhci_update_wake_event(const struct xhci_usb_info *info);
+bool xhci_update_wake_event(const struct xhci_wake_info *wake_info,
+			    size_t wake_info_count);
 
 void soc_xhci_init(struct device *dev);
 
@@ -41,7 +56,7 @@ void soc_xhci_init(struct device *dev);
  *
  * Return: USB ports and status register offset info for the SoC.
  */
-const struct xhci_usb_info *soc_get_xhci_usb_info(void);
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev);
 
 /*
  * usb_xhci_disable_unused() - Disable unused USB devices
diff --git a/src/soc/intel/common/block/xhci/elog.c b/src/soc/intel/common/block/xhci/elog.c
index c3043cb43f..fb598978bd 100644
--- a/src/soc/intel/common/block/xhci/elog.c
+++ b/src/soc/intel/common/block/xhci/elog.c
@@ -20,23 +20,23 @@
 #define XHCI_STATUS_PLS_MASK		(0xF << XHCI_STATUS_PLS_SHIFT)
 #define XHCI_STATUS_PLS_RESUME		(15 << XHCI_STATUS_PLS_SHIFT)
 
-static bool pch_xhci_csc_set(uint32_t port_status)
+static bool xhci_csc_set(uint32_t port_status)
 {
 	return !!(port_status & XHCI_STATUS_CSC);
 }
 
-static bool pch_xhci_wake_capable(uint32_t port_status)
+static bool xhci_wake_capable(uint32_t port_status)
 {
 	return !!((port_status & XHCI_STATUS_WCE) |
 		  (port_status & XHCI_STATUS_WDE));
 }
 
-static bool pch_xhci_plc_set(uint32_t port_status)
+static bool xhci_plc_set(uint32_t port_status)
 {
 	return !!(port_status & XHCI_STATUS_PLC);
 }
 
-static bool pch_xhci_resume(uint32_t port_status)
+static bool xhci_resume(uint32_t port_status)
 {
 	return (port_status & XHCI_STATUS_PLS_MASK) == XHCI_STATUS_PLS_RESUME;
 }
@@ -55,7 +55,7 @@ static bool pch_xhci_resume(uint32_t port_status)
  * true  : Wake source was found.
  * false : Wake source was not found.
  */
-static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t event)
+static bool xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t host_event, uint8_t event)
 {
 	uint32_t i, port_status;
 	bool found = false;
@@ -73,8 +73,9 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t event)
 		 * connect/disconnect to identify if the port caused wake
 		 * event for USB attach/detach.
 		 */
-		if (pch_xhci_csc_set(port_status) &&
-		    pch_xhci_wake_capable(port_status)) {
+		if (xhci_csc_set(port_status) &&
+		    xhci_wake_capable(port_status)) {
+			elog_add_event_wake(host_event, 0);
 			elog_add_event_wake(event, i + 1);
 			found = true;
 			continue;
@@ -84,8 +85,9 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t event)
 		 * Check if PLC is set and PLS indicates resume to identify if
 		 * the port caused wake event for USB activity.
 		 */
-		if (pch_xhci_plc_set(port_status) &&
-		    pch_xhci_resume(port_status)) {
+		if (xhci_plc_set(port_status) &&
+		    xhci_resume(port_status)) {
+			elog_add_event_wake(host_event, 0);
 			elog_add_event_wake(event, i + 1);
 			found = true;
 		}
@@ -93,50 +95,35 @@ static bool pch_xhci_port_wake_check(uintptr_t base, uint8_t num, uint8_t event)
 	return found;
 }
 
-/*
- * Update elog event and instance depending upon the USB2 port that caused
- * the wake event.
- *
- * Return value:
- * true = Indicates that USB2 wake event was found.
- * false = Indicates that USB2 wake event was not found.
- */
-static inline bool pch_xhci_usb2_update_wake_event(uintptr_t mmio_base,
-					const struct xhci_usb_info *info)
-{
-	return pch_xhci_port_wake_check(mmio_base + info->usb2_port_status_reg,
-					info->num_usb2_ports,
-					ELOG_WAKE_SOURCE_PME_XHCI_USB_2);
-}
-
-/*
- * Update elog event and instance depending upon the USB3 port that caused
- * the wake event.
- *
- * Return value:
- * true = Indicates that USB3 wake event was found.
- * false = Indicates that USB3 wake event was not found.
- */
-static inline bool pch_xhci_usb3_update_wake_event(uintptr_t mmio_base,
-					const struct xhci_usb_info *info)
-{
-	return pch_xhci_port_wake_check(mmio_base + info->usb3_port_status_reg,
-					info->num_usb3_ports,
-					ELOG_WAKE_SOURCE_PME_XHCI_USB_3);
-}
-
-bool pch_xhci_update_wake_event(const struct xhci_usb_info *info)
+bool xhci_update_wake_event(const struct xhci_wake_info *wake_info,
+			    size_t wake_info_count)
 {
+	const struct xhci_usb_info *usb_info;
 	uintptr_t mmio_base;
 	bool event_found = false;
-	mmio_base = ALIGN_DOWN(pci_read_config32(PCH_DEV_XHCI,
-					PCI_BASE_ADDRESS_0), 16);
-
-	if (pch_xhci_usb2_update_wake_event(mmio_base, info))
-		event_found = true;
-
-	if (pch_xhci_usb3_update_wake_event(mmio_base, info))
-		event_found = true;
+	size_t i;
+
+	for (i = 0; i < wake_info_count; ++i) {
+		/* Assumes BAR0 is MBAR */
+		mmio_base = pci_s_read_config32(wake_info[i].xhci_dev,
+						PCI_BASE_ADDRESS_0);
+		mmio_base &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
+		usb_info = soc_get_xhci_usb_info(wake_info[i].xhci_dev);
+
+		/* Check USB2 port status & control registers */
+		if (xhci_port_wake_check(mmio_base + usb_info->usb2_port_status_reg,
+					 usb_info->num_usb2_ports,
+					 wake_info[i].elog_wake_type_host,
+					 ELOG_WAKE_SOURCE_PME_XHCI_USB_2))
+			event_found = true;
+
+		/* Check USB3 port status & control registers */
+		if (xhci_port_wake_check(mmio_base + usb_info->usb3_port_status_reg,
+					 usb_info->num_usb3_ports,
+					 wake_info[i].elog_wake_type_host,
+					 ELOG_WAKE_SOURCE_PME_XHCI_USB_3))
+			event_found = true;
+	}
 
 	return event_found;
 }
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index 47f2567d29..705fbb0c62 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -57,7 +57,7 @@ void usb_xhci_disable_unused(bool (*ext_usb_xhci_en_cb)(unsigned int port_type,
 							unsigned int port_id))
 {
 	struct device *xhci, *hub = NULL, *port = NULL;
-	const struct xhci_usb_info *info = soc_get_xhci_usb_info();
+	const struct xhci_usb_info *info = soc_get_xhci_usb_info(PCH_DEVFN_XHCI);
 	struct drivers_usb_acpi_config *config;
 	bool enable;
 
diff --git a/src/soc/intel/jasperlake/elog.c b/src/soc/intel/jasperlake/elog.c
index 5d3c69e3fe..cb9625a675 100644
--- a/src/soc/intel/jasperlake/elog.c
+++ b/src/soc/intel/jasperlake/elog.c
@@ -57,19 +57,6 @@ static void pch_log_rp_wake_source(void)
 	}
 }
 
-static void pch_log_add_elog_event(const struct pme_map *ipme_map)
-{
-	/*
-	 * If wake source is XHCI, check for detailed wake source events on
-	 * USB2/3 ports.
-	 */
-	if ((ipme_map->devfn == PCH_DEVFN_XHCI) &&
-			pch_xhci_update_wake_event(soc_get_xhci_usb_info()))
-		return;
-
-	elog_add_event_wake(ipme_map->wake_source, 0);
-}
-
 static void pch_log_pme_internal_wake_source(void)
 {
 	size_t i;
@@ -80,10 +67,12 @@ static void pch_log_pme_internal_wake_source(void)
 		{ PCH_DEVFN_GBE, ELOG_WAKE_SOURCE_PME_GBE },
 		{ PCH_DEVFN_SATA, ELOG_WAKE_SOURCE_PME_SATA },
 		{ PCH_DEVFN_CSE, ELOG_WAKE_SOURCE_PME_CSE },
-		{ PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
 		{ PCH_DEVFN_USBOTG, ELOG_WAKE_SOURCE_PME_XDCI },
 		{ PCH_DEVFN_CNVI_WIFI, ELOG_WAKE_SOURCE_PME_WIFI },
 	};
+	const struct xhci_wake_info xhci_wake_info[] = {
+		{ PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
+	};
 
 	for (i = 0; i < ARRAY_SIZE(ipme_map); i++) {
 		const struct device *dev = pcidev_path_on_root(ipme_map[i].devfn);
@@ -91,20 +80,21 @@ static void pch_log_pme_internal_wake_source(void)
 			continue;
 
 		if (pci_dev_is_wake_source(dev)) {
-			pch_log_add_elog_event(&ipme_map[i]);
+			elog_add_event_wake(ipme_map[i].wake_source, 0);
 			dev_found = true;
 		}
 	}
 
 	/*
-	 * If device is still not found, but the wake source is internal PME,
-	 * try probing XHCI ports to see if any of the USB2/3 ports indicate
-	 * that it was the wake source. This path would be taken in case of GSMI
-	 * logging with S0ix where the pci_pm_resume_noirq runs and clears the
-	 * PME_STS_BIT in controller register.
+	 * Check the XHCI controllers' USB2 & USB3 ports for wake events. There
+	 * are cases (GSMI logging for S0ix clears PME_STS_BIT) where the XHCI
+	 * controller's PME_STS_BIT may have already been cleared, so the host
+	 * controller wake wouldn't get logged here; therefore, the host
+	 * controller wake event is logged before its corresponding port wake
+	 * event is logged.
 	 */
-	if (!dev_found)
-		dev_found = pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+	dev_found |= xhci_update_wake_event(xhci_wake_info,
+					    ARRAY_SIZE(xhci_wake_info));
 
 	if (!dev_found)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0);
diff --git a/src/soc/intel/jasperlake/xhci.c b/src/soc/intel/jasperlake/xhci.c
index 424751e9d8..eebacca9eb 100644
--- a/src/soc/intel/jasperlake/xhci.c
+++ b/src/soc/intel/jasperlake/xhci.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <device/pci_type.h>
 #include <intelblocks/xhci.h>
 
 #define XHCI_USB2_PORT_STATUS_REG	0x480
@@ -14,7 +15,8 @@ static const struct xhci_usb_info usb_info = {
 	.num_usb3_ports = XHCI_USB3_PORT_NUM,
 };
 
-const struct xhci_usb_info *soc_get_xhci_usb_info(void)
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
 {
+	/* Jasper Lake only has one XHCI controller */
 	return &usb_info;
 }
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c
index dee93d889b..1332e2d7cd 100644
--- a/src/soc/intel/skylake/elog.c
+++ b/src/soc/intel/skylake/elog.c
@@ -34,33 +34,22 @@ struct pme_status_info {
 
 #define PME_STS_BIT		(1 << 15)
 
-static void pch_log_add_elog_event(const struct pme_status_info *info)
-{
-	/*
-	 * If wake source is XHCI, check for detailed wake source events on
-	 * USB2/3 ports.
-	 */
-	if ((info->devfn == PCH_DEVFN_XHCI) &&
-			pch_xhci_update_wake_event(soc_get_xhci_usb_info()))
-		return;
-
-	elog_add_event_wake(info->elog_event, 0);
-}
-
 static void pch_log_pme_internal_wake_source(void)
 {
 	size_t i;
 	uint16_t val;
 	bool dev_found = false;
 
-	struct pme_status_info pme_status_info[] = {
+	const struct pme_status_info pme_status_info[] = {
 		{ PCH_DEVFN_HDA, 0x54, ELOG_WAKE_SOURCE_PME_HDA },
 		{ PCH_DEVFN_GBE, 0xcc, ELOG_WAKE_SOURCE_PME_GBE },
 		{ PCH_DEVFN_SATA, 0x74, ELOG_WAKE_SOURCE_PME_SATA },
 		{ PCH_DEVFN_CSE, 0x54, ELOG_WAKE_SOURCE_PME_CSE },
-		{ PCH_DEVFN_XHCI, 0x74, ELOG_WAKE_SOURCE_PME_XHCI },
 		{ PCH_DEVFN_USBOTG, 0x84, ELOG_WAKE_SOURCE_PME_XDCI },
 	};
+	const struct xhci_wake_info xhci_wake_info[] = {
+		{ PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
+	};
 
 	for (i = 0; i < ARRAY_SIZE(pme_status_info); i++) {
 		pci_devfn_t dev = PCI_DEV(0, PCI_SLOT(pme_status_info[i].devfn),
@@ -71,19 +60,20 @@ static void pch_log_pme_internal_wake_source(void)
 		if ((val == 0xFFFF) || !(val & PME_STS_BIT))
 			continue;
 
-		pch_log_add_elog_event(&pme_status_info[i]);
+		elog_add_event_wake(pme_status_info[i].elog_event, 0);
 		dev_found = true;
 	}
 
 	/*
-	 * If device is still not found, but the wake source is internal PME,
-	 * try probing XHCI ports to see if any of the USB2/3 ports indicate
-	 * that it was the wake source. This path would be taken in case of GSMI
-	 * logging with S0ix where the pci_pm_resume_noirq runs and clears the
-	 * PME_STS_BIT in controller register.
+	 * Check the XHCI controllers' USB2 & USB3 ports for wake events. There
+	 * are cases (GSMI logging for S0ix clears PME_STS_BIT) where the XHCI
+	 * controller's PME_STS_BIT may have already been cleared, so the host
+	 * controller wake wouldn't get logged here; therefore, the host
+	 * controller wake event is logged before its corresponding port wake
+	 * event is logged.
 	 */
-	if (!dev_found)
-		dev_found = pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+	dev_found |= xhci_update_wake_event(xhci_wake_info,
+					    ARRAY_SIZE(xhci_wake_info));
 
 	if (!dev_found)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0);
@@ -137,7 +127,7 @@ static void pch_log_rp_wake_source(void)
 		 * Linux kernel uses PME STS bit information. So do not clear
 		 * this bit.
 		 */
-		pch_log_add_elog_event(&pme_status_info[i]);
+		elog_add_event_wake(pme_status_info[i].elog_event, 0);
 	}
 }
 
diff --git a/src/soc/intel/skylake/xhci.c b/src/soc/intel/skylake/xhci.c
index 048f1f0ee1..66edb3d288 100644
--- a/src/soc/intel/skylake/xhci.c
+++ b/src/soc/intel/skylake/xhci.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <device/pci_type.h>
 #include <intelblocks/xhci.h>
 
 #define XHCI_USB2_PORT_STATUS_REG	0x480
@@ -14,7 +15,7 @@ static const struct xhci_usb_info usb_info = {
 	.num_usb3_ports = XHCI_USB3_PORT_NUM,
 };
 
-const struct xhci_usb_info *soc_get_xhci_usb_info(void)
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
 {
 	return &usb_info;
 }
diff --git a/src/soc/intel/tigerlake/elog.c b/src/soc/intel/tigerlake/elog.c
index 88324d63cf..531f5c11ee 100644
--- a/src/soc/intel/tigerlake/elog.c
+++ b/src/soc/intel/tigerlake/elog.c
@@ -57,54 +57,45 @@ static void pch_log_rp_wake_source(void)
 	}
 }
 
-static void pch_log_add_elog_event(const struct pme_map *ipme_map)
-{
-	/*
-	 * If wake source is XHCI, check for detailed wake source events on
-	 * USB2/3 ports.
-	 */
-	if ((ipme_map->devfn == PCH_DEVFN_XHCI) &&
-			pch_xhci_update_wake_event(soc_get_xhci_usb_info()))
-		return;
-
-	elog_add_event_wake(ipme_map->wake_source, 0);
-}
-
 static void pch_log_pme_internal_wake_source(void)
 {
-	size_t i;
-	bool dev_found = false;
-
 	const struct pme_map ipme_map[] = {
 		{ PCH_DEVFN_HDA, ELOG_WAKE_SOURCE_PME_HDA },
 		{ PCH_DEVFN_GBE, ELOG_WAKE_SOURCE_PME_GBE },
 		{ PCH_DEVFN_SATA, ELOG_WAKE_SOURCE_PME_SATA },
 		{ PCH_DEVFN_CSE, ELOG_WAKE_SOURCE_PME_CSE },
-		{ PCH_DEVFN_XHCI, ELOG_WAKE_SOURCE_PME_XHCI },
 		{ PCH_DEVFN_USBOTG, ELOG_WAKE_SOURCE_PME_XDCI },
 		{ PCH_DEVFN_CNVI_WIFI, ELOG_WAKE_SOURCE_PME_WIFI },
 	};
+	const struct xhci_wake_info xhci_wake_info[] = {
+		{ PCH_DEVFN_XHCI,	ELOG_WAKE_SOURCE_PME_XHCI },
+		{ SA_DEVFN_TCSS_XHCI,	ELOG_WAKE_SOURCE_PME_TCSS_XHCI },
+	};
+	bool dev_found = false;
+	size_t i;
 
 	for (i = 0; i < ARRAY_SIZE(ipme_map); i++) {
-		const struct device *dev = pcidev_path_on_root(ipme_map[i].devfn);
+		const struct device *dev =
+			pcidev_path_on_root(ipme_map[i].devfn);
 		if (!dev)
 			continue;
 
 		if (pci_dev_is_wake_source(dev)) {
-			pch_log_add_elog_event(&ipme_map[i]);
+			elog_add_event_wake(ipme_map[i].wake_source, 0);
 			dev_found = true;
 		}
 	}
 
 	/*
-	 * If device is still not found, but the wake source is internal PME,
-	 * try probing XHCI ports to see if any of the USB2/3 ports indicate
-	 * that it was the wake source. This path would be taken in case of GSMI
-	 * logging with S0ix where the pci_pm_resume_noirq runs and clears the
-	 * PME_STS_BIT in controller register.
+	 * Check the XHCI controllers' USB2 & USB3 ports for wake events. There
+	 * are cases (GSMI logging for S0ix clears PME_STS_BIT) where the XHCI
+	 * controller's PME_STS_BIT may have already been cleared, so the host
+	 * controller wake wouldn't get logged here; therefore, the host
+	 * controller wake event is logged before its corresponding port wake
+	 * event is logged.
 	 */
-	if (!dev_found)
-		dev_found = pch_xhci_update_wake_event(soc_get_xhci_usb_info());
+	dev_found |= xhci_update_wake_event(xhci_wake_info,
+					    ARRAY_SIZE(xhci_wake_info));
 
 	if (!dev_found)
 		elog_add_event_wake(ELOG_WAKE_SOURCE_PME_INTERNAL, 0);
diff --git a/src/soc/intel/tigerlake/xhci.c b/src/soc/intel/tigerlake/xhci.c
index 18bb129983..6f095fa633 100644
--- a/src/soc/intel/tigerlake/xhci.c
+++ b/src/soc/intel/tigerlake/xhci.c
@@ -1,20 +1,39 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <device/pci_type.h>
 #include <intelblocks/xhci.h>
+#include <soc/pci_devs.h>
 
-#define XHCI_USB2_PORT_STATUS_REG	0x480
-#define XHCI_USB3_PORT_STATUS_REG	0x520
-#define XHCI_USB2_PORT_NUM		10
-#define XHCI_USB3_PORT_NUM		4
+#define PCH_XHCI_USB2_PORT_STATUS_REG	0x480
+#define PCH_XHCI_USB3_PORT_STATUS_REG	0x520
+#define PCH_XHCI_USB2_PORT_NUM		10
+#define PCH_XHCI_USB3_PORT_NUM		4
 
-static const struct xhci_usb_info usb_info = {
-	.usb2_port_status_reg = XHCI_USB2_PORT_STATUS_REG,
-	.num_usb2_ports = XHCI_USB2_PORT_NUM,
-	.usb3_port_status_reg = XHCI_USB3_PORT_STATUS_REG,
-	.num_usb3_ports = XHCI_USB3_PORT_NUM,
+#define TCSS_XHCI_USB2_PORT_STATUS_REG	0x480
+#define TCSS_XHCI_USB3_PORT_STATUS_REG	0x490
+#define TCSS_XHCI_USB2_PORT_NUM		1
+#define TCSS_XHCI_USB3_PORT_NUM		4
+
+static const struct xhci_usb_info pch_usb_info = {
+	.usb2_port_status_reg = PCH_XHCI_USB2_PORT_STATUS_REG,
+	.num_usb2_ports = PCH_XHCI_USB2_PORT_NUM,
+	.usb3_port_status_reg = PCH_XHCI_USB3_PORT_STATUS_REG,
+	.num_usb3_ports = PCH_XHCI_USB3_PORT_NUM,
+};
+
+static const struct xhci_usb_info tcss_usb_info = {
+	.usb2_port_status_reg = TCSS_XHCI_USB2_PORT_STATUS_REG,
+	.num_usb2_ports = TCSS_XHCI_USB2_PORT_NUM,
+	.usb3_port_status_reg = TCSS_XHCI_USB3_PORT_STATUS_REG,
+	.num_usb3_ports = TCSS_XHCI_USB3_PORT_NUM,
 };
 
-const struct xhci_usb_info *soc_get_xhci_usb_info(void)
+const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
 {
-	return &usb_info;
+	if (xhci_dev == PCH_DEVFN_XHCI)
+		return &pch_usb_info;
+	else if (xhci_dev == SA_DEVFN_TCSS_XHCI)
+		return &tcss_usb_info;
+
+	return NULL;
 }