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authorCK Hu <ck.hu@mediatek.com>2020-07-15 15:51:47 +0800
committerHung-Te Lin <hungte@chromium.org>2020-08-13 05:33:57 +0000
commit5559a449d4c02b3652d9e5294f4a0550686afbcf (patch)
treea4e83af17eb7641a84aad7f553c7c293ac0e321e /src/soc
parentad700565efe2edfb1d4ca812e00e941d16a5b5ba (diff)
soc/mediatek/mt8192: Initialize build rules
The first Makefile to support building minimal stage files for MT8192 SOC. Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: I2cf68805532f70f072b4e9a21ee61e2ebe4ebd9d Reviewed-on: https://review.coreboot.org/c/coreboot/+/43962 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/mediatek/mt8192/Makefile.inc31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc
new file mode 100644
index 0000000000..25574c9ac8
--- /dev/null
+++ b/src/soc/mediatek/mt8192/Makefile.inc
@@ -0,0 +1,31 @@
+ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y)
+
+bootblock-y += ../common/gpio.c gpio.c
+bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
+bootblock-y += ../common/timer.c
+bootblock-y += ../common/uart.c
+
+verstage-y += ../common/gpio.c gpio.c
+verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
+verstage-y += ../common/timer.c
+verstage-y += ../common/uart.c
+
+romstage-y += ../common/cbmem.c
+romstage-y += emi.c
+romstage-y += ../common/gpio.c gpio.c
+romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
+romstage-y += ../common/timer.c
+romstage-y += ../common/uart.c
+
+ramstage-y += ../common/gpio.c gpio.c
+ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
+ramstage-y += ../common/timer.c
+ramstage-y += ../common/uart.c
+
+CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include
+CPPFLAGS_common += -Isrc/soc/mediatek/common/include
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
+ ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@
+
+endif