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authorFurquan Shaikh <furquan@google.com>2021-02-03 23:02:34 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-02-06 09:05:42 +0000
commit1a5f25ea7f12d76425c6b66b3ff5cca3bb496296 (patch)
tree1f359cca29a3dfdf48e83117d825511a737376bf /src/soc
parent0f30063abf4fa29ba6671dcbab7879334f7bd013 (diff)
intel: Drop FSP_PEIM_TO_PEIM_INTERFACE
This change drops the config FSP_PEIM_TO_PEIM_INTERFACE. FSP_PEIM_TO_PEIM_INTERFACE is used for: * Auto-selecting FSP_USES_MP_SERVICES_PPI * Including src/drivers/intel/fsp2_0/ppi/Kconfig * Adding ppi to subdirs-y * Setting USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI to y and is selected by SoCs that want to enable MP PPI services. Instead of using the indirect path of selecting MP PPI services, this change allows SoC to select FSP_USES_MP_SERVICES_PPI directly. The above uses are handled as follows: * Auto-selecting FSP_USES_MP_SERVICES_PPI --> This is handled by SoC selection of FSP_USES_MP_SERVICES_PPI. * Including src/drivers/intel/fsp2_0/ppi/Kconfig --> The guard isn't really required. The Kconfig options in this file don't present user prompts and don't really need to be guarded. * Adding ppi to subdirs-y --> Makefile under ppi/ already has conditional inclusion of files and does not require a top-level conditional. * Setting USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI to y --> This is set to y if FSP_USES_MP_SERVICES_PPI is selected by SoC. TEST=Verified that timeless build for brya, volteer, icelake_rvp, elkhartlake_crb and waddledee shows no change in generated coreboot.rom Change-Id: I0664f09d85f5be372d19925d47034c76aeeef2ae Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50274 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/Kconfig2
-rw-r--r--src/soc/intel/common/block/cpu/Kconfig3
-rw-r--r--src/soc/intel/elkhartlake/Kconfig2
-rw-r--r--src/soc/intel/icelake/Kconfig2
-rw-r--r--src/soc/intel/jasperlake/Kconfig2
-rw-r--r--src/soc/intel/tigerlake/Kconfig2
6 files changed, 6 insertions, 7 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 806c91b334..0474750862 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -39,7 +39,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_2
- select FSP_PEIM_TO_PEIM_INTERFACE
+ select FSP_USES_MP_SERVICES_PPI
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig
index 2b630d0cdf..f4249c650b 100644
--- a/src/soc/intel/common/block/cpu/Kconfig
+++ b/src/soc/intel/common/block/cpu/Kconfig
@@ -75,8 +75,7 @@ config USE_INTEL_FSP_MP_INIT
config USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI
bool "Perform MP Initialization by FSP using coreboot MP PPI service"
- depends on FSP_USES_MP_SERVICES_PPI
- default y if FSP_PEIM_TO_PEIM_INTERFACE
+ default y if FSP_USES_MP_SERVICES_PPI
default n
help
This option allows FSP to make use of MP services PPI published by
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
index 7ad103db0d..34926402db 100644
--- a/src/soc/intel/elkhartlake/Kconfig
+++ b/src/soc/intel/elkhartlake/Kconfig
@@ -31,7 +31,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_1
- select FSP_PEIM_TO_PEIM_INTERFACE
+ select FSP_USES_MP_SERVICES_PPI
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig
index a14be36737..dc62b102b1 100644
--- a/src/soc/intel/icelake/Kconfig
+++ b/src/soc/intel/icelake/Kconfig
@@ -31,7 +31,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_1
- select FSP_PEIM_TO_PEIM_INTERFACE
+ select FSP_USES_MP_SERVICES_PPI
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
index 5324d84142..633a19c4c6 100644
--- a/src/soc/intel/jasperlake/Kconfig
+++ b/src/soc/intel/jasperlake/Kconfig
@@ -32,7 +32,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_2
- select FSP_PEIM_TO_PEIM_INTERFACE
+ select FSP_USES_MP_SERVICES_PPI
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index cd84bdf453..16efca8666 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -35,7 +35,7 @@ config CPU_SPECIFIC_OPTIONS
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_2
- select FSP_PEIM_TO_PEIM_INTERFACE
+ select FSP_USES_MP_SERVICES_PPI
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM