soc/amd/picasso: Move BERT region to cbmem

Allocate storage for the BERT reserved memory in cbmem, and add it in
response to a romstage hook.  Add a Kconfig option for adjusting the
size reserved.  This is different from the Stoney Ridge implementation
where it was intentionally oversized to ease MTRR use and to keep TSEG
aligned.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4759154d394a8f5b35c0ef0a15994bbef25492e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38694
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions