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authorMarshall Dawson <marshalldawson3rd@gmail.com>2020-01-21 14:53:45 -0700
committerFelix Held <felix-coreboot@felixheld.de>2020-04-18 15:54:33 +0000
commit901cb9ca46b334aeb0134fa19cc87b445420c7fa (patch)
tree49041319f49b998515b6146286cf0780a5746b80 /src/soc/ucb
parent4fc59af03d0d76caa0b8497ea894f360c15c1a39 (diff)
soc/amd/picasso: Move BERT region to cbmem
Allocate storage for the BERT reserved memory in cbmem, and add it in response to a romstage hook. Add a Kconfig option for adjusting the size reserved. This is different from the Stoney Ridge implementation where it was intentionally oversized to ease MTRR use and to keep TSEG aligned. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4759154d394a8f5b35c0ef0a15994bbef25492e5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38694 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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