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| author | Tom Warren <twarren@nvidia.com> | 2015-05-21 15:21:12 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-23 22:58:32 +0200 |
| commit | 355dc1e66ae4de309ec801a1d168fe98dd4ca3f1 (patch) | |
| tree | 50d11d67f70a8f1d81e02314f4aef82e6fbcf65a /src/soc/ucb/riscv | |
| parent | 018216d120bc19da71e2586a7b437d56ec07494e (diff) | |
nvidia/tegra: expose more registers
This is in preparation for t210
Change-Id: I3e640b1f7fc583518361527dec4c3c1072c80251
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e762d4bde1a18691257453e4b87a0bb42a0a2d7c
Original-Change-Id: Ida096106bb0137c07ad62d2df06628e37f0d884c
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/272754
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10632
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/ucb/riscv')
0 files changed, 0 insertions, 0 deletions