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author | Lijian Zhao <lijian.zhao@intel.com> | 2018-09-25 15:52:03 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-28 09:53:59 +0000 |
commit | 1d900935df918318e198ae61eb8bf42ef1edf674 (patch) | |
tree | a33dc88a6c4331a85ab830fff18aec4f01217fe9 /src/soc/ucb/riscv | |
parent | 4586ccdfe6e62e6c104f65f798e6242c7a146333 (diff) |
soc/intel/cannonlake: Add ACPI entry for LAN
Add ACPI DSDT entry for integrated Gigabit LAN controller.
Change-Id: I15bf1d4065894531871380b3318f553b637f4a97
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/28743
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/ucb/riscv')
0 files changed, 0 insertions, 0 deletions