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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-10-20 13:20:25 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2018-02-16 22:46:48 +0000 |
| commit | 178e65d2276886a240822638a2f904388416531f (patch) | |
| tree | 80272103c82905dc88a768bdc574f00cda3d3889 /src/soc/ucb/riscv | |
| parent | bb90fb55d0bd09ad2865ed791641f1fcf778f0eb (diff) | |
amd/stoneyridge: Move model_15_init.c to cpu.c
Move the remaining model_15_init.c functionality to cpu.c, making it
similar to other soc implementations.
Change-Id: Ic8c62b09209fcdaa50ff8ffc7773ef155f979a1b
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/23724
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Diffstat (limited to 'src/soc/ucb/riscv')
0 files changed, 0 insertions, 0 deletions