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authorFurquan Shaikh <furquan@google.com>2020-12-31 21:15:34 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 08:48:57 +0000
commitf06d046c1041477adbd6e40a038667a620641b38 (patch)
tree9f7a6905178a62d327094756c0d08ff73bb4fc7d /src/soc/ucb/riscv/chip.c
parent859ca18ced83ed3b8b529112da5f214ede3d38b0 (diff)
soc/intel/tgl and tgl mb/google,intel: Use the newly added meminit block driver
This change uses the newly added meminit block driver and updates TGL SoC and mainboard code accordingly. TEST=Verified that UPDs are configured correctly with and without this change. Change-Id: I6d58cd6568b7bbe03c4e3011b2301209893e85a9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49042 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'src/soc/ucb/riscv/chip.c')
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