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authorJulius Werner <jwerner@chromium.org>2014-12-17 17:38:38 -0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-15 16:31:41 +0200
commit908ceefd25ffd6427c3a53502598006bacf22750 (patch)
treed0d7c1de246c17e70b27ab0708dd1676fb123041 /src/soc/ucb/Makefile.inc
parent3cbf02cc8897ab5c90c3a06f6e8121ce09c243a5 (diff)
veyron: Fix TPM I2C initialization and sync boards
Due to a missing i2c_init(), we were actually running our TPM with default divisors at 660KHz. Oops. While it's commendable that both the TPM and our controller seem to have been running fine all this time at more than 1.5 times the maximum frequency they support, we should probably still get that fixed. Also sync Speedy back up to the other Veyron boards since it seems to have missed a recent SDMMC patch. BRANCH=None BUG=None TEST=Booted Pinky. Change-Id: I255c66624b21bf48b12f950208ba2c401a75c4e4 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: f2bd7c8579cd90d2f800c777c1981557d81a9b49 Original-Change-Id: I43e6b5fe02aca605a5b243c5b876bd44b90b2bf9 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/236580 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9634 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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