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author | Felix Held <felix-coreboot@felixheld.de> | 2020-08-25 17:27:41 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2020-09-30 21:38:53 +0000 |
commit | 6646cb09729bfe560e8b1383b7255c2e2a8f3d86 (patch) | |
tree | 6dcf06cff12b67c7a7f13f834fe2c2b82c3e2b35 /src/soc/ucb/Kconfig | |
parent | e310c7747ac8dadb49f008eb0196217d1a219740 (diff) |
mb/amd/mandolin: change EFS SPI mode from 1-4-4 to 1-1-4
With this change the flash addresses will only get transferred over one
data pin like in the non-quad SPI mode and only the data will get sent
over all four data pins. Since this gives the flash chip a bit more time
to fetch the data the host requested, this allows higher SPI frequencies
resulting in a higher throughput when bigger chunks of memory get read.
BRANCH=zork
Change-Id: Iad4c922ffcdba4b17e6e81244ff37302eb171d97
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45831
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/ucb/Kconfig')
0 files changed, 0 insertions, 0 deletions