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author | Felix Singer <felixsinger@posteo.net> | 2020-12-28 10:32:50 +0100 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-29 16:35:57 +0000 |
commit | bd0fa62b6be176395dc119099236709e52a6203e (patch) | |
tree | 9b67442fbea963ebb1c225532ddf7106a1e8872f /src/soc/ti | |
parent | dcbb87a3ecca3e056a01b0231c52eeb70ff716ea (diff) |
soc/intel/skylake: Add 4 missing root ports to chipset dt
The Kaby Lake PCH can have up to 24 PCIe root ports. Thus, add 4 missing
root ports to the chipset devicetree.
Change-Id: I443fb736873d47f1b6fe7718a10e1bb4ae5df2a6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48947
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/ti')
0 files changed, 0 insertions, 0 deletions