soc/intel/meteorlake: Enable FSP multiphase

This patch changes the UPD EnableMultiPhaseSiliconInit to enable the
Meteor Lake FSP multiphase flow.

BUG=b:247670186
TEST=Able to build and boot Google, Rex with MultiPhaseSiInit Enable.

[SPEW ]  Executing Phase 1 of FspMultiPhaseSiInit
[DEBUG]  FSP MultiPhaseSiInit src/soc/intel/meteorlake/
         fsp_params.c/platform_fsp_multi_phase_init_cb called
[DEBUG]  port C0 DISC req: usage 1 usb3 1 usb2 2
[DEBUG]  Raw Buffer output 0 00000211
[DEBUG]  Raw Buffer output 1 00000000
[DEBUG]  pmc_send_ipc_cmd succeeded
[DEBUG]  port C1 DISC req: usage 1 usb3 3 usb2 4
[DEBUG]  Raw Buffer output 0 00000431
[DEBUG]  Raw Buffer output 1 00000000
[DEBUG]  pmc_send_ipc_cmd succeeded

Change-Id: I759c0ecee29c07bae4abe6b56d015e7253bd49fe
Signed-off-by: zhaojohn <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67741
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>

0 files changed, 0 insertions, 0 deletions