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| author | Zheng Bao <zheng.bao@amd.com> | 2020-06-09 09:13:24 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-10 01:49:42 +0000 |
| commit | a4098c759dca00ef47c821032a5effe572083645 (patch) | |
| tree | 8c4b3f2000cc73bdc902db016b5f19c30f4c1a18 /src/soc/sifive | |
| parent | 56da63c3dc3f50cfac541c779b608e1bae9e635c (diff) | |
amd/common: Add the macro definition for patch level MSR
This MSR is used for detecting if the micro code is applied
successfully.
Change-Id: I060eb1a31f3358341ac0d5b9105e710c351f2ce8
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42212
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/sifive')
0 files changed, 0 insertions, 0 deletions