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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-10-29 14:25:05 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-03 13:18:04 +0000
commit90fd0727c7c3be143caef7fb397c093a3151ba3b (patch)
tree9432ae44311f7559a6b8617a03bb42dc3051b84e /src/soc/sifive
parent6fe488b45fdd3c656b0a9f2858423d20bf374007 (diff)
soc/sifive/fu540: Simplify UART refclk calculation
clock_get_coreclk_khz() already detects whether the PLL or the input clock (hfclk) is used. Tested on HiFive Unleashed. Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/c/29334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/sifive')
-rw-r--r--src/soc/sifive/fu540/Makefile.inc1
-rw-r--r--src/soc/sifive/fu540/clock.c1
-rw-r--r--src/soc/sifive/fu540/uart.c7
3 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/sifive/fu540/Makefile.inc b/src/soc/sifive/fu540/Makefile.inc
index fef859d9e4..4f62f3ed62 100644
--- a/src/soc/sifive/fu540/Makefile.inc
+++ b/src/soc/sifive/fu540/Makefile.inc
@@ -17,6 +17,7 @@ bootblock-y += uart.c
bootblock-y += clint.c
bootblock-y += media.c
bootblock-y += bootblock.c
+bootblock-y += clock.c
romstage-y += uart.c
romstage-y += clint.c
diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c
index 20dce23a64..a8b61f1760 100644
--- a/src/soc/sifive/fu540/clock.c
+++ b/src/soc/sifive/fu540/clock.c
@@ -242,6 +242,7 @@ void clock_init(void)
}
#endif /* ENV_ROMSTAGE */
+/* Get the core clock's frequency, in KHz */
int clock_get_coreclk_khz(void)
{
if (read32(&prci->coreclksel) & PRCI_CORECLK_MASK)
diff --git a/src/soc/sifive/fu540/uart.c b/src/soc/sifive/fu540/uart.c
index b563be13b1..454b13d111 100644
--- a/src/soc/sifive/fu540/uart.c
+++ b/src/soc/sifive/fu540/uart.c
@@ -30,11 +30,8 @@ uintptr_t uart_platform_base(int idx)
unsigned int uart_platform_refclk(void)
{
/*
- * The SiFive UART uses tlclk, which is coreclk/2 as input
+ * The SiFive UART uses tlclk, which is coreclk/2, as input
*/
- if (ENV_BOOTBLOCK)
- return 33330000 / 2;
- else
- return clock_get_coreclk_khz() * KHz / 2;
+ return clock_get_coreclk_khz() * KHz / 2;
}