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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-28 19:55:10 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-02 07:43:48 +0000 |
| commit | cb4672885e636206101a3266fd6ae001447d4f5d (patch) | |
| tree | d59bb8267df1605c6e698903f9029aac01c143c1 /src/soc/sifive | |
| parent | 729c0695e5e93d7f7e48ddd72787769ff62cd8b9 (diff) | |
sb/intel/i82371eb: Fix 16-bit read/write PCI_COMMAND register
Change-Id: Icecda127a7229c1410c73a6fdd0898430f7eceb2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40809
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/sifive')
0 files changed, 0 insertions, 0 deletions