soc/sifive/fu740: Add FU740 SOC

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I4a8fe02ef0adcb939aa65377a35874715c5ee58a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: ron minnich <rminnich@gmail.com>

1 files changed, 32 insertions, 0 deletions

diff --git a/src/soc/sifive/fu740/Makefile.inc b/src/soc/sifive/fu740/Makefile.inc
new file mode 100644
index 0000000000..86c90dfb77
--- /dev/null
+++ b/src/soc/sifive/fu740/Makefile.inc
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+ifeq ($(CONFIG_SOC_SIFIVE_FU740),y)
+
+CPPFLAGS_common += -Isrc/soc/sifive/fu740/include
+
+bootblock-y += uart.c
+bootblock-y += clint.c
+bootblock-y += spi.c
+bootblock-y += sdram.c
+bootblock-y += cbmem.c
+bootblock-y += otp.c
+bootblock-y += clock.c
+bootblock-y += ddrregs.c
+bootblock-y += chip.c
+bootblock-y += gpio.c
+
+
+ramstage-y += uart.c
+ramstage-y += clint.c
+ramstage-y += spi.c
+ramstage-y += sdram.c
+ramstage-y += cbmem.c
+ramstage-y += otp.c
+ramstage-y += clock.c
+ramstage-y += chip.c
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
+	@printf "    GPT        $(notdir $(@))\n"
+	@util/riscv/sifive-gpt.py $< $@
+
+endif