diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:47:58 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-24 09:16:48 +0000 |
| commit | cbcce2415bba2cc26d47b5491c73eb281eedb48f (patch) | |
| tree | a7c5e9ce0e80f54e1d98ca35a8bd32db5ba3ff62 /src/soc/sifive/fu540/clock.c | |
| parent | c94b38ec1336fa6b90a77b82582feb9093d8a274 (diff) | |
soc/sifive: Drop unneeded empty lines
Change-Id: I20008c71d5b573d72a09068626523e10faa2d632
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44602
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/sifive/fu540/clock.c')
| -rw-r--r-- | src/soc/sifive/fu540/clock.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c index 9b21532bba..977f938eb4 100644 --- a/src/soc/sifive/fu540/clock.c +++ b/src/soc/sifive/fu540/clock.c @@ -177,7 +177,6 @@ static void init_gemgxlclk(void) write32(&prci->gemgxlpllcfg1, cfg1); } - #define FU540_UART_DEVICES 2 #define FU540_UART_REG_DIV 0x18 #define FU540_UART_DIV_VAL 4 @@ -185,7 +184,6 @@ static void init_gemgxlclk(void) #define FU540_SPI_DIV 0x00 #define FU540_SPI_DIV_VAL 4 - static void update_peripheral_clock_dividers(void) { write32((uint32_t *)(FU540_QSPI0 + FU540_SPI_DIV), FU540_SPI_DIV_VAL); |