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authorJulien Viard de Galbert <jviarddegalbert@online.net>2018-02-20 11:45:48 +0100
committerMartin Roth <martinroth@google.com>2018-02-21 16:09:06 +0000
commit235daa4bf6b6467b5df675dcfe5041b7f62eeae3 (patch)
tree074bc4b58e2da4c7f6fb43c5e7613b08861d5d33 /src/soc/samsung
parentfa650f5e8c7cd81138b60d09d4a41b5454f03cc1 (diff)
driver/uart: Introduce a way for mainboard to override the baudrate
The rationale is to allow the mainboard to override the default baudrate for instance by sampling GPIOs at boot. A new configuration option is available for mainboards to select this behaviour. It will then have to define the function get_uart_baudrate to return the computed baudrate. Change-Id: I970ee788bf90b9e1a8c6ccdc5eee8029d9af0ecc Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/23713 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/samsung')
-rw-r--r--src/soc/samsung/exynos5250/uart.c4
-rw-r--r--src/soc/samsung/exynos5420/uart.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c
index 7ad6cbe6d9..78c72804c9 100644
--- a/src/soc/samsung/exynos5250/uart.c
+++ b/src/soc/samsung/exynos5250/uart.c
@@ -61,7 +61,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart)
// All UARTs share the same clock.
uclk = clock_get_periph_rate(PERIPH_ID_UART3);
- val = uclk / CONFIG_TTYS0_BAUD;
+ val = uclk / get_uart_baudrate();
write32(&uart->ubrdiv, val / 16 - 1);
@@ -191,7 +191,7 @@ void uart_fill_lb(void *data)
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = get_uart_baudrate();
serial.regwidth = 4;
lb_add_serial(&serial, data);
diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c
index a38be07d13..146151ee5b 100644
--- a/src/soc/samsung/exynos5420/uart.c
+++ b/src/soc/samsung/exynos5420/uart.c
@@ -61,7 +61,7 @@ static void serial_setbrg_dev(struct s5p_uart *uart)
// All UARTs share the same clock.
uclk = clock_get_periph_rate(PERIPH_ID_UART3);
- val = uclk / CONFIG_TTYS0_BAUD;
+ val = uclk / get_uart_baudrate();
write32(&uart->ubrdiv, val / 16 - 1);
@@ -182,7 +182,7 @@ void uart_fill_lb(void *data)
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
- serial.baud = CONFIG_TTYS0_BAUD;
+ serial.baud = get_uart_baudrate();
serial.regwidth = 4;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = 0;