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| author | Raul E Rangel <rrangel@chromium.org> | 2021-01-22 09:44:03 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-23 20:14:28 +0000 |
| commit | 91839eef5cb47ec82e9b9d824ac49d7edbff0534 (patch) | |
| tree | 06b7db931ce3045565d0678c6c78569100d1b628 /src/soc/samsung/exynos5420 | |
| parent | 76e72a0dd5b0dcc5c86a57545802e90e6c2a8d6b (diff) | |
soc/amd/picasso/pcie_gpp: Add clarifying comment
Each bridge can only have one device.
BUG=b:170595019
BRANCH=zork
TEST=none
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I7e476221dfcabc841cc1ed4bc4b1175c0652dcfe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49841
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/samsung/exynos5420')
0 files changed, 0 insertions, 0 deletions