src/soc: Use "foo *bar" instead of "foo* bar"

Change-Id: I21680354f33916b7b4d913f51a842b5d6c2ecef3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

4 files changed, 16 insertions, 16 deletions

diff --git a/src/soc/samsung/exynos5420/dp_lowlevel.c b/src/soc/samsung/exynos5420/dp_lowlevel.c
index e955dcd360..1fae4d78b3 100644
--- a/src/soc/samsung/exynos5420/dp_lowlevel.c
+++ b/src/soc/samsung/exynos5420/dp_lowlevel.c
@@ -916,7 +916,7 @@ unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt)
 void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
 		unsigned char lanecnt)
 {
-	void * reg_list[DP_LANE_CNT_4] = {
+	void *reg_list[DP_LANE_CNT_4] = {
 		&dp_regs->ln0_link_training_ctl,
 		&dp_regs->ln1_link_training_ctl,
 		&dp_regs->ln2_link_training_ctl,
diff --git a/src/soc/samsung/exynos5420/include/soc/alternate_cbfs.h b/src/soc/samsung/exynos5420/include/soc/alternate_cbfs.h
index 4bda93c706..40af40bd2a 100644
--- a/src/soc/samsung/exynos5420/include/soc/alternate_cbfs.h
+++ b/src/soc/samsung/exynos5420/include/soc/alternate_cbfs.h
@@ -17,14 +17,14 @@
 #define CPU_SAMSUNG_EXYNOS5420_ALTERNATE_CBFS_H
 
 /* These are pointers to function pointers. Double indirection! */
-static void * * const irom_sdmmc_read_blocks_ptr = (void * *)0x02020030;
-static void * * const irom_msh_read_from_fifo_emmc_ptr = (void * *)0x02020044;
-static void * * const irom_msh_end_boot_op_emmc_ptr = (void * *)0x02020048;
-static void * * const irom_spi_sf_read_ptr = (void * *)0x02020058;
-static void * * const irom_load_image_from_usb_ptr = (void * *)0x02020070;
+static void **const irom_sdmmc_read_blocks_ptr = (void **)0x02020030;
+static void **const irom_msh_read_from_fifo_emmc_ptr = (void **)0x02020044;
+static void **const irom_msh_end_boot_op_emmc_ptr = (void **)0x02020048;
+static void **const irom_spi_sf_read_ptr = (void **)0x02020058;
+static void **const irom_load_image_from_usb_ptr = (void **)0x02020070;
 
 #define SECONDARY_BASE_BOOT_USB 0xfeed0002
-static u32 * const iram_secondary_base = (u32 *)0x02020018;
+static u32 *const iram_secondary_base = (u32 *)0x02020018;
 
 /* Values pulled from U-Boot, I think the manual is wrong here (for SPI) */
 #define OM_STAT_SDMMC 0x4
diff --git a/src/soc/samsung/exynos5420/include/soc/power.h b/src/soc/samsung/exynos5420/include/soc/power.h
index 4fb96fd941..c5709a55e9 100644
--- a/src/soc/samsung/exynos5420/include/soc/power.h
+++ b/src/soc/samsung/exynos5420/include/soc/power.h
@@ -76,7 +76,7 @@ struct exynos5_power {
 } __packed;
 check_member(exynos5_power, ps_hold_ctrl, 0x330c);
 
-static struct exynos5_power * const exynos_power = (void*)EXYNOS5_POWER_BASE;
+static struct exynos5_power *const exynos_power = (void *)EXYNOS5_POWER_BASE;
 
 /**
  * Perform a software reset.
diff --git a/src/soc/samsung/exynos5420/smp.c b/src/soc/samsung/exynos5420/smp.c
index 7086da847f..4a5c10508e 100644
--- a/src/soc/samsung/exynos5420/smp.c
+++ b/src/soc/samsung/exynos5420/smp.c
@@ -45,12 +45,12 @@
 #define CORE_STATE_SWITCH_CLUSTER			(1 << 4)
 
 /* The default address to re-power on a code. */
-#define CORE_RESET_INIT_ADDRESS				((void*)0x00000000)
+#define CORE_RESET_INIT_ADDRESS				((void *)0x00000000)
 
 /* Vectors in BL1 (0x02020000 = base of iRAM). */
-#define VECTOR_CORE_SEV_HANDLER			((void*)(intptr_t)0x02020004)
-#define VECTOR_LOW_POWER_FLAG			((void*)(intptr_t)0x02020028)
-#define VECTOR_LOW_POWER_ADDRESS		((void*)(intptr_t)0x0202002C)
+#define VECTOR_CORE_SEV_HANDLER			((void *)(intptr_t)0x02020004)
+#define VECTOR_LOW_POWER_FLAG			((void *)(intptr_t)0x02020028)
+#define VECTOR_LOW_POWER_ADDRESS		((void *)(intptr_t)0x0202002C)
 
 /* The data structure for the "CPU state" memory page (shared with kernel)
  * controlling cores in active cluster. Kernel will put starting address for one
@@ -93,12 +93,12 @@ inline static uint32_t get_bits(uint32_t value, uint32_t start, uint32_t len)
 }
 
 /* Waits the referenced address to be ready (non-zero) and then jump into it. */
-static void wait_and_jump(volatile uint32_t* reference)
+static void wait_and_jump(volatile uint32_t *reference)
 {
 	while (!*reference) {
 		wfe();
 	}
-	jump_bx((void*)*reference);
+	jump_bx((void *)*reference);
 }
 
 /* Configures L2 Control Register to use 3 cycles for DATA/TAG RAM latency. */
@@ -127,7 +127,7 @@ static void configure_l2actlr(void)
 
 /* Initializes the CPU states to reset state. */
 static void init_exynos_cpu_states(void) {
-	memset((void*)exynos_cpu_states, 0, sizeof(*exynos_cpu_states));
+	memset((void *)exynos_cpu_states, 0, sizeof(*exynos_cpu_states));
 	exynos_cpu_states->cpu_states[0] = CORE_STATE_RESET;
 	exynos_cpu_states->cpu_states[1] = CORE_STATE_SECONDARY_RESET;
 	exynos_cpu_states->cpu_states[2] = CORE_STATE_SECONDARY_RESET;
@@ -176,7 +176,7 @@ static void core_start_execution(void)
 	/* Standard Exynos suspend/resume. */
 	if (exynos_power->inform1) {
 		exynos_power->inform1 = 0;
-		jump_bx((void*)exynos_power->inform0);
+		jump_bx((void *)exynos_power->inform0);
 		/* never returns. */
 	}