arm(64): Replace write32() and friends with writel()

This patch is a raw application of the following spatch to the
directories src/arch/arm(64)?, src/mainboard/<arm(64)-board>,
src/soc/<arm(64)-soc> and src/drivers/gic:

@@
expression A, V;
@@
- write32(V, A)
+ writel(V, A)
@@
expression A, V;
@@
- write16(V, A)
+ writew(V, A)
@@
expression A, V;
@@
- write8(V, A)
+ writeb(V, A)

This replaces all uses of write{32,16,8}() with write{l,w,b}()
which is currently equivalent and much more common. This is a
preparatory step that will allow us to easier flip them all at once to
the new write32(a,v) model.

BRANCH=none
BUG=chromium:451388
TEST=Compiled Cosmos, Daisy, Blaze, Pit, Ryu, Storm and Pinky.

Change-Id: I16016cd77780e7cadbabe7d8aa7ab465b95b8f09
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 93f0ada19b429b4e30d67335b4e61d0f43597b24
Original-Change-Id: I1ac01c67efef4656607663253ed298ff4d0ef89d
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254862
Reviewed-on: http://review.coreboot.org/9834
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

3 files changed, 9 insertions, 9 deletions

diff --git a/src/soc/samsung/exynos5420/dmc_init_ddr3.c b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
index 802625f153..8186b6dbdf 100644
--- a/src/soc/samsung/exynos5420/dmc_init_ddr3.c
+++ b/src/soc/samsung/exynos5420/dmc_init_ddr3.c
@@ -189,8 +189,8 @@ int ddr3_mem_ctrl_init(struct mem_timings *mem, int interleave_size, int reset)
 		 * release pad retention and retain the memory content until the
 		 * initialization is complete.
 		 */
-		write32(PAD_RETENTION_DRAM_COREBLK_VAL,
-			&exynos_power->padret_dram_cblk_opt);
+		writel(PAD_RETENTION_DRAM_COREBLK_VAL,
+		       &exynos_power->padret_dram_cblk_opt);
 		do {
 			ret = read32(&exynos_power->padret_dram_status);
 		} while (ret != 0x1);
diff --git a/src/soc/samsung/exynos5420/dp_lowlevel.c b/src/soc/samsung/exynos5420/dp_lowlevel.c
index 00fcb5c817..5a3adf907e 100644
--- a/src/soc/samsung/exynos5420/dp_lowlevel.c
+++ b/src/soc/samsung/exynos5420/dp_lowlevel.c
@@ -55,7 +55,7 @@ static inline unsigned long fradl(void *v) {
 
 #define lread32(a) fradl((void *)(a))
 #else
-#define lwrite32(a,b) write32((unsigned long)(a), (void *)(b))
+#define lwrite32(a,b) writel((unsigned long)(a), (void *)(b))
 #define lread32(a) read32((void *)(a))
 #endif
 
diff --git a/src/soc/samsung/exynos5420/i2c.c b/src/soc/samsung/exynos5420/i2c.c
index f1b7c6b5bb..28e3f0c331 100644
--- a/src/soc/samsung/exynos5420/i2c.c
+++ b/src/soc/samsung/exynos5420/i2c.c
@@ -430,7 +430,7 @@ static int hsi2c_senddata(struct hsi2c_regs *regs, const uint8_t *data, int len)
 {
 	while (!hsi2c_check_transfer(regs) && len) {
 		if (!(read32(&regs->usi_fifo_stat) & Hsi2cTxFifoFull)) {
-			write32(*data++, &regs->usi_txdata);
+			writel(*data++, &regs->usi_txdata);
 			len--;
 		}
 	}
@@ -452,7 +452,7 @@ static int hsi2c_segment(struct i2c_seg *seg, struct hsi2c_regs *regs, int stop)
 {
 	const uint32_t usi_ctl = Hsi2cFuncModeI2c | Hsi2cMaster;
 
-	write32(HSI2C_SLV_ADDR_MAS(seg->chip), &regs->i2c_addr);
+	writel(HSI2C_SLV_ADDR_MAS(seg->chip), &regs->i2c_addr);
 
 	/*
 	 * We really only want to stop after this transaction (I think) if the
@@ -465,14 +465,14 @@ static int hsi2c_segment(struct i2c_seg *seg, struct hsi2c_regs *regs, int stop)
 		seg->len | Hsi2cMasterRun | Hsi2cStopAfterTrans;
 
 	if (seg->read) {
-		write32(usi_ctl | Hsi2cRxchon, &regs->usi_ctl);
-		write32(autoconf | Hsi2cReadWrite, &regs->i2c_auto_conf);
+		writel(usi_ctl | Hsi2cRxchon, &regs->usi_ctl);
+		writel(autoconf | Hsi2cReadWrite, &regs->i2c_auto_conf);
 
 		if (hsi2c_recvdata(regs, seg->buf, seg->len))
 			return -1;
 	} else {
-		write32(usi_ctl | Hsi2cTxchon, &regs->usi_ctl);
-		write32(autoconf, &regs->i2c_auto_conf);
+		writel(usi_ctl | Hsi2cTxchon, &regs->usi_ctl);
+		writel(autoconf, &regs->i2c_auto_conf);
 
 		if (hsi2c_senddata(regs, seg->buf, seg->len))
 			return -1;