soc/samsung: Drop unneeded empty lines

Change-Id: Ib2843c40de8e4607b8b9d665761a689227878bc0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

7 files changed, 0 insertions, 20 deletions

diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c
index 7c2fd9f035..758e09b05d 100644
--- a/src/soc/samsung/exynos5420/dp.c
+++ b/src/soc/samsung/exynos5420/dp.c
@@ -31,7 +31,6 @@
  * 11. Source sends video data.
  */
 
-
 static int exynos_dp_init_dp(void)
 {
 	int ret;
@@ -843,7 +842,6 @@ int exynos_init_dp(struct edp_device_info *edp_info)
 {
 	unsigned int ret;
 
-
 	dp_phy_control(1);
 
 	ret = exynos_dp_init_dp();
diff --git a/src/soc/samsung/exynos5420/dp_lowlevel.c b/src/soc/samsung/exynos5420/dp_lowlevel.c
index e53adbb8c8..b6d9e0b37f 100644
--- a/src/soc/samsung/exynos5420/dp_lowlevel.c
+++ b/src/soc/samsung/exynos5420/dp_lowlevel.c
@@ -75,7 +75,6 @@ void exynos_dp_enable_video_mute(unsigned int enable)
 	return;
 }
 
-
 static void exynos_dp_init_analog_param(void)
 {
 	u32 reg;
@@ -999,7 +998,6 @@ int exynos_dp_init_video(void)
 	return 0;
 }
 
-
 void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info)
 {
 	u32 reg;
diff --git a/src/soc/samsung/exynos5420/i2c.c b/src/soc/samsung/exynos5420/i2c.c
index 45657f13cf..ab17d52c44 100644
--- a/src/soc/samsung/exynos5420/i2c.c
+++ b/src/soc/samsung/exynos5420/i2c.c
@@ -71,7 +71,6 @@ struct i2c_bus
 	unsigned int clk_div;
 };
 
-
 static struct i2c_bus i2c_busses[] = {
 	{
 		.bus_num = 0,
@@ -236,9 +235,6 @@ enum {
 	I2cStatMasterXmit = 0x3 << 6
 };
 
-
-
-
 static int hsi2c_get_clk_details(struct i2c_bus *i2c, int *div, int *cycle,
 				 unsigned int op_clk)
 {
@@ -487,9 +483,6 @@ static int hsi2c_transfer(struct i2c_bus *i2c, struct i2c_msg *segments,
 	return 0;
 }
 
-
-
-
 static int i2c_int_pending(struct i2c_regs *regs)
 {
 	return read8(&regs->con) & I2cConIntPending;
@@ -539,9 +532,6 @@ static int i2c_wait_for_int(struct i2c_regs *regs)
 	return 1;
 }
 
-
-
-
 static int i2c_send_stop(struct i2c_regs *regs)
 {
 	uint8_t mode = read8(&regs->stat) & (I2cStatModeMask);
diff --git a/src/soc/samsung/exynos5420/include/soc/dmc.h b/src/soc/samsung/exynos5420/include/soc/dmc.h
index 7dd09f9e83..a17f1fecba 100644
--- a/src/soc/samsung/exynos5420/include/soc/dmc.h
+++ b/src/soc/samsung/exynos5420/include/soc/dmc.h
@@ -300,7 +300,6 @@ enum {
 	MEM_TIMINGS_MSR_COUNT	= 5,
 };
 
-
 /* These are the memory timings for a particular memory type and speed */
 struct mem_timings {
 	enum mem_manuf mem_manuf;	/* Memory manufacturer */
diff --git a/src/soc/samsung/exynos5420/include/soc/dp.h b/src/soc/samsung/exynos5420/include/soc/dp.h
index 6d4b2d7ac1..50a6cbf5ee 100644
--- a/src/soc/samsung/exynos5420/include/soc/dp.h
+++ b/src/soc/samsung/exynos5420/include/soc/dp.h
@@ -1338,12 +1338,10 @@ enum {
 	VIDEO_TIMING_FROM_REGISTER
 };
 
-
 struct exynos_dp_platform_data {
 	struct edp_device_info *edp_dev_info;
 };
 
-
 int exynos_init_dp(struct edp_device_info *edp_info);
 
 void exynos_set_dp_platform_data(struct exynos_dp_platform_data *pd);
diff --git a/src/soc/samsung/exynos5420/include/soc/dsim.h b/src/soc/samsung/exynos5420/include/soc/dsim.h
index 82067fa226..b6b7ee9a12 100644
--- a/src/soc/samsung/exynos5420/include/soc/dsim.h
+++ b/src/soc/samsung/exynos5420/include/soc/dsim.h
@@ -52,7 +52,6 @@ check_member(exynos5_dsim, phyacchr1, 0x54);
 #define VIDEO_MODE			(1 << 25)
 #define BURST_MODE			(1 << 26)
 
-
 #define DSIM_PHYACCHR_AFC_EN		(1 << 14)
 #define DSIM_PHYACCHR_AFC_CTL_OFFSET	5
 
diff --git a/src/soc/samsung/exynos5420/include/soc/setup.h b/src/soc/samsung/exynos5420/include/soc/setup.h
index 8454537249..4867c56eed 100644
--- a/src/soc/samsung/exynos5420/include/soc/setup.h
+++ b/src/soc/samsung/exynos5420/include/soc/setup.h
@@ -642,7 +642,6 @@ struct exynos5_phy_control;
 #define CTRL_FORCE_MASK		(0x7F << 8)
 #define CTRL_LOCK_COARSE_MASK	(0x7F << 10)
 
-
 #define CTRL_OFFSETD_RESET_VAL	0x8
 #define CTRL_OFFSETD_VAL	0x7F
 
@@ -711,7 +710,6 @@ struct exynos5_phy_control;
 #define PHY_CON39_VAL_34_OHM	0x0DB60DB6
 #define PHY_CON39_VAL_30_OHM	0x0FFF0FFF
 
-
 #define CTRL_BSTLEN_OFFSET	8
 #define CTRL_RDLAT_OFFSET	0