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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2021-01-29 15:14:25 -0800
committerNick Vaccaro <nvaccaro@google.com>2021-04-10 00:55:13 +0000
commit7c25317093bfae2010e3cfb1981910d8592d8f70 (patch)
treeee5a55abcef4f2fedd1c31a8bcd65b3bcf45ce15 /src/soc/samsung/exynos5420/i2c.c
parentb571846ea4e69981dc593faa82c861cdd6ece078 (diff)
vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v4043
Update FSP headers for Tiger Lake platform generated based on FSP version 4043. Previous version was 3444. BUG=b:178846052 BRANCH=none TEST=none Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Change-Id: Ibada380fe757d9a8b50b2ddfeb2c86b4a98cb5e2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50154 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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