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authorMartin Roth <martin.roth@se-eng.com>2014-12-07 14:59:11 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-08 05:39:07 +0100
commit1fc2ba5e6d85f3c7eef00a7e6b0b3ee1352fbfa9 (patch)
treec943575806918a817060c0fc638625b42294733e /src/soc/samsung/exynos5420/dp.c
parentde7ed6fc7cdb3f55894e613bdc0c394fa8f57494 (diff)
samsung/exynos5420: Spelling Fixes
Change-Id: I966645c83ae78943a7dbb9dc05af4fded6f4e5b5 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7703 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/soc/samsung/exynos5420/dp.c')
-rw-r--r--src/soc/samsung/exynos5420/dp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c
index b147035b64..4c54b4fef1 100644
--- a/src/soc/samsung/exynos5420/dp.c
+++ b/src/soc/samsung/exynos5420/dp.c
@@ -218,7 +218,7 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info)
printk(BIOS_ERR, "DP Wrong MAX LINK RATE : %x\n", temp);
return -1;
}
- /*Refer VESA Display Port Stnadard Ver1.1a Page 120 */
+ /*Refer VESA Display Port Standard Ver1.1a Page 120 */
if (edp_info->dpcd_rev == DP_DPCD_REV_11) {
temp = buf[DPCD_MAX_LANE_COUNT] & 0x1f;
if (buf[DPCD_MAX_LANE_COUNT] & 0x80)
@@ -420,7 +420,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num,
unsigned char buf;
unsigned int dpcd_addr;
- /*lane_num value is used as arry index, so this range 0 ~ 3 */
+ /*lane_num value is used as array index, so this range 0 ~ 3 */
dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2);
ret = exynos_dp_read_byte_from_dpcd(dpcd_addr, &buf);