summaryrefslogtreecommitdiff
path: root/src/soc/samsung/exynos5420/Makefile.inc
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2019-10-20 01:00:57 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-11-03 11:19:04 +0000
commit2f389f151a0db244def706bc90fd17fe091d8537 (patch)
tree4269a24bc3f25749c85eb39357d68135964e35ef /src/soc/samsung/exynos5420/Makefile.inc
parent7c9a0e8a9cfa90f8f413f3b485f8103bca80fac6 (diff)
arch/arm: Pass cbmem_top to ramstage via calling argument
This solution is very generic and can in principle be implemented on all arch/soc. Instead trying to figure out which files can be removed from stages and which cbmem_top implementations need with preprocessor, rename all cbmem_top implementation to cbmem_top_romstage. Mechanisms set in place to pass on information from rom- to ram-stage will be placed in a followup commit. Change-Id: If31f0f1de17ffc92c9397f32b26db25aff4b7cab Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/samsung/exynos5420/Makefile.inc')
-rw-r--r--src/soc/samsung/exynos5420/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index b41e9f96f3..dc25919ff6 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -40,7 +40,6 @@ ramstage-y += gpio.c
ramstage-y += i2c.c
ramstage-y += dp.c dp_lowlevel.c fimd.c
ramstage-y += usb.c
-ramstage-y += cbmem.c
rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c