diff options
| author | Uwe Poeche <uwe.poeche@siemens.com> | 2022-04-11 13:17:32 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-23 11:54:58 +0000 |
| commit | bf378a0fdf5b57b9d9122b56634362222d846571 (patch) | |
| tree | 73e8bc6f7db74f3a9859e6a1afd1dcaff2766252 /src/soc/samsung/exynos5250/uart.c | |
| parent | 0ce586b1a44ac12563b1ac23b6612df862e520af (diff) | |
mb/siemens/mc_ehl: Disable RAPL
Disable RAPL for all mainboards based on mc_ehl for stable real time
mode of CPUs.
Test: Boot mc_ehl1 with this patch and ensure the bits in the MCBAR
register are cleared.
Change-Id: Ie58a4b6444d5be088ac2b25ff0a2f5cd33120ace
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/samsung/exynos5250/uart.c')
0 files changed, 0 insertions, 0 deletions