diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2020-10-21 15:20:50 -0700 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2020-11-07 00:12:35 +0000 |
| commit | 9e0dd96e7e457943629ef54b34fb14fd207069e2 (patch) | |
| tree | f216ec59cb764336810b64f7352b832d4cb9e92d /src/soc/rockchip | |
| parent | 7bfef7d50ce6e7c6e562189249a180e4e9861749 (diff) | |
vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark option
Intel CPX-SP FSP ww45 release annotates default values for FSP-M UPD
variables.
FSPM MemRefreshWatermark option support is present in FB's CPX-SP
FSP binary, but not in Intel's CPX-SP FSP binary. In FB's CPX-SP
FSP binary, this option takes the space of UnusedUpdSpace0[0].
For DeltaLake mainboard, if corresponding VPD variable is set, use it
to control the behavior. Such control is effective when FB's CPX-SP
FSP binary is used.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I57ad01f33b92bf61a6a2725dd1cdbbc99c02405d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Diffstat (limited to 'src/soc/rockchip')
0 files changed, 0 insertions, 0 deletions