diff options
| author | Julius Werner <jwerner@chromium.org> | 2017-12-08 16:42:59 -0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2017-12-11 19:03:45 +0000 |
| commit | 5598db254fe34cb9b3557fcfba915d90725bf173 (patch) | |
| tree | 7b9f70d83c829c68f1ee92657b12f2cf05a6052b /src/soc/rockchip | |
| parent | ef935f04e0c65d48424b80040741a7c8745368b8 (diff) | |
google/gru: Stop mucking with unused I2S0 pins in codec config
Due to a schematic error, our code was written to configure more I2S0
pins than are actually used. We're also pinmuxing the whole bank of pins
over to the I2S controller even though we don't need them all. Restrict
the GPIO initialization and pinmuxing to the pins we really need so the
other ones can be correctly used as SKU ID pins on Scarlet.
Also, move the "audio" IO voltage domain selection to the other such
selections in the bootblock, since that covers two whole banks of GPIOs
and there's no guarantee that they're all used for audio (and thus not
needed before ramstage).
BUG=b:69373077
TEST=Booted Scarlet, confirmed correct SKU ID (7) was detected on rev2.
Change-Id: I9314617e725fe83d254984529f269d4442e736f1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/22791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Schneider <dnschneid@chromium.org>
Diffstat (limited to 'src/soc/rockchip')
| -rw-r--r-- | src/soc/rockchip/rk3399/include/soc/grf.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3399/include/soc/grf.h b/src/soc/rockchip/rk3399/include/soc/grf.h index 8e120071a0..9bda967269 100644 --- a/src/soc/rockchip/rk3399/include/soc/grf.h +++ b/src/soc/rockchip/rk3399/include/soc/grf.h @@ -356,8 +356,7 @@ static struct rk3399_pmusgrf_regs * const rk3399_pmusgrf = (void *)PMUSGRF_BASE; #define IOMUX_I2C0_SCL RK_CLRSETBITS(3 << 0, 2 << 0) #define IOMUX_I2C0_SDA RK_CLRSETBITS(3 << 14, 2 << 14) -#define IOMUX_I2S0 RK_SETBITS(1 << 14 | 1 << 12 | 1 << 10 | 1 << 8 |\ - 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0) +#define IOMUX_I2S0_SD0 RK_SETBITS(1 << 14 | 1 << 6 | 1 << 4 | 1 << 2 | 1 << 0) #define IOMUX_I2SCLK RK_SETBITS(1 << 0) #define IOMUX_PWM_0 RK_SETBITS(1 << 4) |