summaryrefslogtreecommitdiff
path: root/src/soc/rockchip
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2020-08-30 13:51:44 +0530
committerSubrata Banik <subrata.banik@intel.com>2020-09-01 03:06:04 +0000
commit8e6d5f2937c169914e46b5ebc973e5df5e4290a7 (patch)
tree1550c8877877a7a9b197da65bcff76f878bee560 /src/soc/rockchip
parentb7a68d5b05259a07a84a546e6a7e40948ba705ac (diff)
{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent
Convert 0X -> 0x Signed-off-by: Subrata Banik <subrata.banik@intel.com> Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/rockchip')
-rw-r--r--src/soc/rockchip/rk3399/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c
index ea1d7ff531..0ba07d6137 100644
--- a/src/soc/rockchip/rk3399/clock.c
+++ b/src/soc/rockchip/rk3399/clock.c
@@ -81,7 +81,7 @@ enum {
PLL_SSMOD_RESET_SHIFT = 2,
PLL_SSMOD_DOWNSPEAD_MASK = 1,
PLL_SSMOD_DOWNSPEAD_SHIFT = 3,
- PLL_SSMOD_DIVVAL_MASK = 0Xf,
+ PLL_SSMOD_DIVVAL_MASK = 0xf,
PLL_SSMOD_DIVVAL_SHIFT = 4,
PLL_SSMOD_SPREADAMP_MASK = 0x1f,
PLL_SSMOD_SPREADAMP_SHIFT = 8,