diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-02-20 18:20:57 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-24 13:04:02 +0000 |
commit | 8d1b0f1dbd2736391d4011106527a1e5b286307d (patch) | |
tree | 494ff06c2a0f8bd0c5c189dcdcbcebfc12f9749c /src/soc/rockchip/rk3399/tsadc.c | |
parent | 23e3f9d6ed4f841f0c5222a2aa2cb586f2210d95 (diff) |
soc/rockchip: Fix typos
Change-Id: I85ccb9e1458340bd5bc2a0eb9abed8d0eeb2fe65
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399/tsadc.c')
-rw-r--r-- | src/soc/rockchip/rk3399/tsadc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3399/tsadc.c b/src/soc/rockchip/rk3399/tsadc.c index 1cdb355237..9f699150fc 100644 --- a/src/soc/rockchip/rk3399/tsadc.c +++ b/src/soc/rockchip/rk3399/tsadc.c @@ -112,7 +112,7 @@ void tsadc_init(uint32_t polarity) /* setup the automatic mode: * AUTO_PERIOD: interleave between every two accessing of TSADC - * AUTO_DEBOUNCE: only generate interrupt or TSHUT when temprature + * AUTO_DEBOUNCE: only generate interrupt or TSHUT when temperature * is higher than COMP_INT for "debounce" times * AUTO_PERIOD_HT: the interleave between every two accessing after the * temperature is higher than COMP_SHUT or COMP_INT @@ -123,7 +123,7 @@ void tsadc_init(uint32_t polarity) write32(&rk3399_tsadc->hight_int_debounce, AUTO_DEBOUNCE); write32(&rk3399_tsadc->auto_period_ht, AUTO_PERIOD_HT); write32(&rk3399_tsadc->hight_tshut_debounce, AUTO_DEBOUNCE_HT); - /* Enable the src0, negative temprature coefficient */ + /* Enable the src0, negative temperature coefficient */ setbits32(&rk3399_tsadc->auto_con, Q_SEL | SRC0_EN); udelay(100); setbits32(&rk3399_tsadc->auto_con, AUTO_EN); |