diff options
| author | Lin Huang <hl@rock-chips.com> | 2016-03-26 11:50:05 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:45:35 +0200 |
| commit | 19eb7509d380fd5d9e6d083ad0d2633820c8db4b (patch) | |
| tree | 9a2241f7e47ff6d7cfb8e4f56c6c7acfc44b797c /src/soc/rockchip/rk3399/soc.c | |
| parent | c4cbf482f796b12f240bb88340a61ecac12ee090 (diff) | |
rockchip: make sure sdram top does not spill into MMIO space
The base address of MMIO space is different for different Rockchip
SOCs. Define them in the appropriate address map files and use the
definition in common code.
BRANCH=none
BUG=chrome-os-partner:51537
TEST=emerge-kevin coreboot
Change-Id: I615f3cadd6d5d994b7dd1defbd10d02ad5c994da
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 24f941e960e4a2cfb9fc26415f56e240de3d00d9
Original-Change-Id: Ia48d75e7de546b17636cde7829ee09837b9d7ac9
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/337190
Original-Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/14717
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3399/soc.c')
| -rw-r--r-- | src/soc/rockchip/rk3399/soc.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c index aa21038e64..453dc0f595 100644 --- a/src/soc/rockchip/rk3399/soc.c +++ b/src/soc/rockchip/rk3399/soc.c @@ -13,18 +13,19 @@ * GNU General Public License for more details. */ -#include <cpu/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <device/device.h> -#include <stdlib.h> +#include <soc/addressmap.h> #include <stddef.h> +#include <stdlib.h> #include <string.h> #include <symbols.h> static void soc_read_resources(device_t dev) { ram_resource(dev, 0, (uintptr_t)_dram / KiB, - CONFIG_DRAM_SIZE_MB * KiB); + min(CONFIG_DRAM_SIZE_MB * KiB, MAX_DRAM_ADDRESS / KiB)); } static void soc_init(device_t dev) |