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authorMartin Roth <gaumless@gmail.com>2024-01-18 12:38:34 -0700
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-01-24 10:02:41 +0000
commitd0037efda9e9ce855279d21b891d29edbfb664fb (patch)
tree44357607200028db703837b21ed814525ae1b213 /src/soc/rockchip/rk3399/Makefile.mk
parentea198585628ea58a90d85957b7b87b8fd46b0176 (diff)
soc/*: Rename Makefiles from .inc to .mk
The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I6f502b97864fd7782e514ee2daa902d2081633a2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80074 Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/rockchip/rk3399/Makefile.mk')
-rw-r--r--src/soc/rockchip/rk3399/Makefile.mk75
1 files changed, 75 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/Makefile.mk b/src/soc/rockchip/rk3399/Makefile.mk
new file mode 100644
index 0000000000..8521bf3e14
--- /dev/null
+++ b/src/soc/rockchip/rk3399/Makefile.mk
@@ -0,0 +1,75 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y)
+
+IDBTOOL = util/rockchip/make_idb.py
+
+decompressor-y += decompressor.c
+decompressor-y += timer.c
+
+bootblock-y += ../common/i2c.c
+bootblock-y += ../common/spi.c
+bootblock-y += ../common/uart.c
+bootblock-y += ../common/gpio.c
+bootblock-y += ../common/pwm.c
+bootblock-y += bootblock.c
+bootblock-y += clock.c
+bootblock-y += gpio.c
+bootblock-y += saradc.c
+bootblock-y += timer.c
+
+verstage-y += ../common/gpio.c
+verstage-y += gpio.c
+verstage-y += sdram.c
+verstage-y += ../common/i2c.c
+verstage-y += ../common/spi.c
+verstage-y += ../common/uart.c
+verstage-y += clock.c
+verstage-y += timer.c
+
+################################################################################
+
+romstage-y += ../common/cbmem.c
+romstage-y += sdram.c
+romstage-y += ../common/spi.c
+romstage-y += ../common/uart.c
+romstage-y += clock.c
+romstage-y += ../common/pwm.c
+romstage-y += timer.c
+romstage-y += tsadc.c
+romstage-y += usb.c
+romstage-y += gpio.c
+romstage-y += saradc.c
+romstage-y += ../common/gpio.c
+romstage-y += ../common/i2c.c
+
+################################################################################
+
+ramstage-y += sdram.c
+ramstage-y += ../common/spi.c
+ramstage-y += ../common/uart.c
+ramstage-y += clock.c
+ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display.c
+ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/edp.c
+ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += mipi.c
+ramstage-y += ../common/gpio.c
+ramstage-y += gpio.c
+ramstage-y += ../common/i2c.c
+ramstage-y += saradc.c
+ramstage-y += soc.c
+ramstage-y += timer.c
+ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/vop.c
+ramstage-y += usb.c
+
+BL31_MAKEARGS += PLAT=rk3399 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)"
+################################################################################
+
+CPPFLAGS_common += -Isrc/soc/rockchip/rk3399/include
+CPPFLAGS_common += -Isrc/soc/rockchip/common/include
+
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
+ @printf "Generating: $(subst $(obj)/,,$(@))\n"
+ $(Q)mkdir -p $(dir $@)
+ $(Q)$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK33
+
+endif