diff options
| author | huang lin <hl@rock-chips.com> | 2016-03-02 18:46:24 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-05-09 08:43:07 +0200 |
| commit | 4f17374dfd25db1bbb163c474de6dc6f8a7d9e84 (patch) | |
| tree | c15570eeced226f68202f020edf8a539f5070c0c /src/soc/rockchip/rk3399/Makefile.inc | |
| parent | 347c83cfc9310f640cd744856fc63e095a41680e (diff) | |
rockchip: rk3399: add i2c clock driver
This patch add i2c clock driver and reuse the common
rockchip i2c driver.
The i2c0,4,8 src clock from ppll, while i2c1,2,3,5,6,7 from gpll.
Please refer to TRM V0.3 Part1 Page 142 for i2c clock setting.
BRANCH=none
BUG=chrome-os-partner:51537
TEST=emerge-kevin coreboot
Change-Id: I91822e483244d71798a1c68f14ba0a84f405a665
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 270118e44d159f6a27812fa234b34fe7ac54cbe4
Original-Change-Id: Iea5f4a93cf173e1278166dcb04e19a4ef6c4af04
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/338948
Reviewed-on: https://review.coreboot.org/14711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3399/Makefile.inc')
| -rw-r--r-- | src/soc/rockchip/rk3399/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc index 40c652fcf2..bdd9d3eb26 100644 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -51,6 +51,7 @@ ramstage-y += sdram.c ramstage-y += ../common/spi.c ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c ramstage-y += clock.c +ramstage-y += ../common/i2c.c ramstage-y += soc.c ramstage-y += timer.c |