diff options
author | huang lin <hl@rock-chips.com> | 2016-03-02 18:38:40 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2016-04-13 23:37:55 +0200 |
commit | c14b54dd170cb2fae16a5086134208caba0593f8 (patch) | |
tree | 1c413ebbddf0af3af98e2529b479ccad866c21b6 /src/soc/rockchip/rk3399/Makefile.inc | |
parent | 46f8bd70efdf6c00336477ae792157676d68fd04 (diff) |
rockchip/rk3399: Add a stub implementation of the rk3399 SOC
Most things still need to be filled in, but this will allow
us to build boards which use this SOC.
BRANCH=none
BUG=chrome-os-partner:51537
TEST=with the rest of the patches applied Kevin board can be booted to
Linux login propmt.
Change-Id: I6f2407ff578dcd3d0daed86dd03d8f5f4edcac53
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 27dfc39efe95025be2271e2e00e9df93b7907840
Original-Change-Id: I6f2407ff578dcd3d0daed86dd03d8f5f4edcac53
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/332385
Reviewed-on: https://review.coreboot.org/13915
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/rockchip/rk3399/Makefile.inc')
-rw-r--r-- | src/soc/rockchip/rk3399/Makefile.inc | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc new file mode 100644 index 0000000000..54a7b5168d --- /dev/null +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -0,0 +1,61 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2016 Rockchip Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y) + +IDBTOOL = util/rockchip/make_idb.py + +bootblock-y += ../common/spi.c +ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) +bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c +endif +bootblock-y += bootblock.c +bootblock-y += clock.c +bootblock-y += timer.c + +verstage-y += ../common/cbmem.c +verstage-y += ../common/spi.c +verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c +verstage-y += clock.c +verstage-y += timer.c + +################################################################################ + +romstage-y += ../common/cbmem.c +romstage-y += ../common/spi.c +romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c +romstage-y += clock.c +romstage-y += timer.c + +################################################################################ + +ramstage-y += ../common/cbmem.c +ramstage-y += ../common/spi.c +ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c +ramstage-y += clock.c +ramstage-y += soc.c +ramstage-y += timer.c + +################################################################################ + +CPPFLAGS_common += -Isrc/soc/rockchip/rk3399/include +CPPFLAGS_common += -Isrc/soc/rockchip/common/include + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf "Generating: $(subst $(obj)/,,$(@))\n" + @mkdir -p $(dir $@) + @$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK33 + +endif |