diff options
| author | David Hendricks <dhendrix@chromium.org> | 2015-07-30 18:49:48 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-08-28 06:42:03 +0000 |
| commit | 7dbf9c6747ccdfa8b993d3843a22722742957611 (patch) | |
| tree | a069e96ccfc13888c6df8a3d91a5864fc8acbc8e /src/soc/rockchip/rk3288/vop.c | |
| parent | a3b898aaf0ddf48fc3a577f4c39dd1d8acf31b6f (diff) | |
edid: Use edid_mode struct to reduce redundancy
This replaces various timing mode parameters parameters with
an edid_mode struct within the edid struct.
BUG=none
BRANCH=firmware-veyron
TEST=built and booted on Mickey, saw display come up, also
compiled for link,falco,peppy,rambi,nyan_big,rush,smaug
[pg: extended to also cover peach_pit, daisy and lenovo/t530]
Change-Id: Icd0d67bfd3c422be087976261806b9525b2b9c7e
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Original-Commit-Id: abcbf25c81b25fadf71cae106e01b3e36391f5e9
Original-Change-Id: I1bfba5b06a708d042286db56b37f67302f61fff6
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/289964
Original-Reviewed-by: Yakir Yang <ykk@rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/11388
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/vop.c')
| -rw-r--r-- | src/soc/rockchip/rk3288/vop.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/src/soc/rockchip/rk3288/vop.c b/src/soc/rockchip/rk3288/vop.c index 30b73c2d40..784c6c7fa2 100644 --- a/src/soc/rockchip/rk3288/vop.c +++ b/src/soc/rockchip/rk3288/vop.c @@ -39,12 +39,12 @@ void rkvop_enable(u32 vop_id, u32 fbbase, const struct edid *edid) { u32 lb_mode; u32 rgb_mode; - u32 hactive = edid->ha; - u32 vactive = edid->va; - u32 hsync_len = edid->hspw; - u32 hback_porch = edid->hbl - edid->hso - edid->hspw; - u32 vsync_len = edid->vspw; - u32 vback_porch = edid->vbl - edid->vso - edid->vspw; + u32 hactive = edid->mode.ha; + u32 vactive = edid->mode.va; + u32 hsync_len = edid->mode.hspw; + u32 hback_porch = edid->mode.hbl - edid->mode.hso - edid->mode.hspw; + u32 vsync_len = edid->mode.vspw; + u32 vback_porch = edid->mode.vbl - edid->mode.vso - edid->mode.vspw; u32 xpos = 0, ypos = 0; struct rk3288_vop_regs *preg = vop_regs[vop_id]; @@ -98,14 +98,14 @@ void rkvop_enable(u32 vop_id, u32 fbbase, const struct edid *edid) void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) { - u32 hactive = edid->ha; - u32 vactive = edid->va; - u32 hfront_porch = edid->hso; - u32 hsync_len = edid->hspw; - u32 hback_porch = edid->hbl - edid->hso - edid->hspw; - u32 vfront_porch = edid->vso; - u32 vsync_len = edid->vspw; - u32 vback_porch = edid->vbl - edid->vso - edid->vspw; + u32 hactive = edid->mode.ha; + u32 vactive = edid->mode.va; + u32 hfront_porch = edid->mode.hso; + u32 hsync_len = edid->mode.hspw; + u32 hback_porch = edid->mode.hbl - edid->mode.hso - edid->mode.hspw; + u32 vfront_porch = edid->mode.vso; + u32 vsync_len = edid->mode.vspw; + u32 vback_porch = edid->mode.vbl - edid->mode.vso - edid->mode.vspw; struct rk3288_vop_regs *preg = vop_regs[vop_id]; switch (mode) { @@ -125,8 +125,8 @@ void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) clrsetbits_le32(&preg->dsp_ctrl0, M_DSP_OUT_MODE | M_DSP_VSYNC_POL | M_DSP_HSYNC_POL, V_DSP_OUT_MODE(15) | - V_DSP_HSYNC_POL(edid->phsync == '+') | - V_DSP_VSYNC_POL(edid->pvsync == '+')); + V_DSP_HSYNC_POL(edid->mode.phsync == '+') | + V_DSP_VSYNC_POL(edid->mode.pvsync == '+')); write32(&preg->dsp_htotal_hs_end, V_HSYNC(hsync_len) | V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch)); |