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authorJulius Werner <jwerner@chromium.org>2015-02-19 20:19:23 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-21 08:22:40 +0200
commit941847652406982f3c9944fdd98cce4029b533fb (patch)
treeaf52ebeaa0245c9a3aa1e25c77f2271b67bff4a8 /src/soc/rockchip/rk3288/uart.c
parent2f37bd65518865688b9234afce0d467508d6f465 (diff)
arm(64): Manually clean up the mess left by write32() transition
This patch is a manual cleanup of all the rubble left by coccinelle waltzing through our code base. It's generally not very good with line breaks and sometimes even eats comments, so this patch is my best attempt at putting it all back together. Also finally remove those hated writel()-style macros from the headers. BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: Id572f69c420c35577701feb154faa5aaf79cd13e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 817402a80ab77083728b55aed74b3b4202ba7f1d Original-Change-Id: I3b0dcd6fe09fc4e3b83ee491625d6dced98e3047 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/254865 Reviewed-on: http://review.coreboot.org/9837 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/uart.c')
-rw-r--r--src/soc/rockchip/rk3288/uart.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/rockchip/rk3288/uart.c b/src/soc/rockchip/rk3288/uart.c
index 8ba1fdee73..7710c99760 100644
--- a/src/soc/rockchip/rk3288/uart.c
+++ b/src/soc/rockchip/rk3288/uart.c
@@ -103,8 +103,8 @@ static void rk3288_uart_init(void)
// Hide the divisor latches.
write32(&uart_ptr->lcr, line_config);
// Enable FIFOs, and clear receive and transmit.
- write32(&uart_ptr->fcr,
- UART8250_FCR_FIFO_EN | UART8250_FCR_CLEAR_RCVR | UART8250_FCR_CLEAR_XMIT);
+ write32(&uart_ptr->fcr, UART8250_FCR_FIFO_EN |
+ UART8250_FCR_CLEAR_RCVR | UART8250_FCR_CLEAR_XMIT);
}
static void rk3288_uart_tx_byte(unsigned char data)