aboutsummaryrefslogtreecommitdiff
path: root/src/soc/rockchip/rk3288/tsadc.c
diff options
context:
space:
mode:
authorV Sowmya <v.sowmya@intel.com>2021-01-20 07:55:20 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-02-27 09:40:47 +0000
commitae930d85c2e1c2d833877072ca782eab1e2607a8 (patch)
tree217c3493ed0a37227bf7fb23046d437d78b8a720 /src/soc/rockchip/rk3288/tsadc.c
parent31b4209201c91359305ffb7a877249103340d349 (diff)
mb/intel/shadowmountain: Add the ramstage code
This patch includes the ramstage changes for the shadowmountain board. BUG=b:175808146 TEST= Build and boot shadowmountain board. Signed-off-by: V Sowmya <v.sowmya@intel.com> Change-Id: I419eecefddf9ee6e4249ada041ebeb1b78e85eb7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49732 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/tsadc.c')
0 files changed, 0 insertions, 0 deletions