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authorElyes Haouas <ehaouas@noos.fr>2024-03-23 15:13:20 +0100
committerElyes Haouas <ehaouas@noos.fr>2024-03-30 07:43:42 +0000
commit43225cbdfadca1054d95da901e23c53aa363272a (patch)
tree6eb639c929fb1205ce28258b682dbe12a77e6837 /src/soc/rockchip/rk3288/sdram.c
parent54e97b8d6e1b6620a86fb70e7e6b2e912fbfd1ca (diff)
soc/rockchip: Remove blank lines before '}' and after '{'
Change-Id: I140daa5b862ffd3a5b5468d7cb9dbdd81426855e Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81459 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/sdram.c')
-rw-r--r--src/soc/rockchip/rk3288/sdram.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c
index 2efe19bd2c..0237ca26f2 100644
--- a/src/soc/rockchip/rk3288/sdram.c
+++ b/src/soc/rockchip/rk3288/sdram.c
@@ -683,7 +683,6 @@ static void phy_cfg(u32 channel, const struct rk3288_sdram_params *sdram_params)
for (i = 0; i < 4; i++)
clrbits32(&ddr_publ_regs->datx8[i].dxgcr,
DQSRTT | DQRTT);
-
}
}
@@ -798,7 +797,6 @@ static void set_bandwidth_ratio(u32 channel, u32 n)
DXDLLCR_DLLSRST);
}
setbits32(&ddr_pctl_regs->dfistcfg0, 1 << 2);
-
}
static int data_training(u32 channel,
@@ -1074,7 +1072,6 @@ size_t sdram_size_mb(void)
u32 ch;
if (!size_mb) {
-
u32 sys_reg = read32(&rk3288_pmu->sys_reg[2]);
u32 ch_num = SYS_REG_DEC_NUM_CH(sys_reg);