diff options
| author | Lin Huang <hl@rock-chips.com> | 2016-03-23 19:35:46 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2016-04-13 23:38:50 +0200 |
| commit | 6d6b129ea43ba847ba50efa249fbad3a4ad745bc (patch) | |
| tree | 762a89405a6ce59edfc9251e41f7334c01cf0489 /src/soc/rockchip/rk3288/include | |
| parent | d4c175b97b7c3503e1debdf45e20882cd12bec3a (diff) | |
rockchip/rk3288: refactor pwm driver
3288 and 3399 use the same pwm controller.
With this patch in place it is easy to add support for 3399.
BRANCH=none
BUG=none
TEST=booted veyron_jerry to kernel login prompt
Change-Id: If8f5697b4003d078b46de3fa3cebad6c8310a688
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: acf6132619167743c0c991b75f0f49c8d0e51ca7
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Change-Id: I79428f9ec71017ad8f3ad67dac1468178ccc3a1e
Original-Reviewed-on: https://chromium-review.googlesource.com/338019
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14336
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/rockchip/rk3288/include')
| -rw-r--r-- | src/soc/rockchip/rk3288/include/soc/addressmap.h | 2 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3288/include/soc/clock.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/rockchip/rk3288/include/soc/addressmap.h b/src/soc/rockchip/rk3288/include/soc/addressmap.h index fb07cafaed..ba59404f55 100644 --- a/src/soc/rockchip/rk3288/include/soc/addressmap.h +++ b/src/soc/rockchip/rk3288/include/soc/addressmap.h @@ -52,7 +52,7 @@ #define I2C0_BASE 0xFF650000 #define I2C2_BASE 0xFF660000 #define DW_PWM0123_BASE 0xFF670000 -#define RK_PWM0123_BASE 0xFF680000 +#define RK_PWM_BASE 0xFF680000 #define UART2_BASE 0xFF690000 #define TIMER0_BASE 0xFF6B0000 diff --git a/src/soc/rockchip/rk3288/include/soc/clock.h b/src/soc/rockchip/rk3288/include/soc/clock.h index 9592c985df..a629789762 100644 --- a/src/soc/rockchip/rk3288/include/soc/clock.h +++ b/src/soc/rockchip/rk3288/include/soc/clock.h @@ -39,6 +39,8 @@ enum apll_frequencies { #define PERI_HCLK_HZ (148500*KHz) #define PERI_PCLK_HZ (74250*KHz) +#define PWM_CLOCK_HZ PD_BUS_PCLK_HZ + void rkclk_init(void); void rkclk_configure_spi(unsigned int bus, unsigned int hz); void rkclk_ddr_reset(u32 ch, u32 ctl, u32 phy); |